參數(shù)資料
型號(hào): NRF9E5-EVKIT433
廠商: Electronic Theatre Controls, Inc.
英文描述: 433/868/915MHz RF Transceiver with Embedded 8051 Compatible Microcontroller and 4 Input, 10 Bit ADC
中文描述: 433/868/915MHz RF收發(fā)器與8051兼容的嵌入式微控制器和4輸入,10位ADC
文件頁數(shù): 6/104頁
文件大?。?/td> 1436K
代理商: NRF9E5-EVKIT433
PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989
Revision: 1.1
Page 6 of 104
June 2004
X000
EIP
B
EIE
ACC
EICON
PSW
T2CON
X001
X010
X011
X100
X101
X110
HWREV
X111
F8
F0
E8
E0
D8
D0
C8
C0
B8
RCAP2L
RCAP2H
TL2
TH2
IP
CKLF
CON
TEST_
MODE
B0
RSTREA
S
SPI
_DATA
PWM
DUTY
SPI
_CTRL
REGX
_MSB
SPI
CLK
REGX
_LSB
TICK_
DV
REGX
_CTRL
CK_
CTRL
A8
IE
PWM
CON
A0
98
90
88
80
P2
SCON
P1
TCON
P0
SBUF
EXIF
TMOD
SP
MPAGE
TL0
DPL0
P0_DRV
TL1
DPH0
P0_DIR
TH0
DPL1
P0_ALT
TH1
DPH1
P1_DIR
CKCON
DPS
P1_ALT
SPC_FNC
PCON
Table 3 SFR Register map.
1.2
PWM
The nRF9E5 has one programmable PWM (Pulse-Width Modulation) output, which is
the alternate function of P0.7. The resolution of the PWM is software programmable to
6, 7 or 8 bits. The frequency of the PWM signal is programmable via a 6 bit prescaler
from the XTAL oscillator. The duty cycle is programmable between 0% and 100% via
one 8-bit register.
1.3
SPI
nRF9E5 features a simple single buffered SPI (Serial Programmable Interface) master.
The 3 data lines of the SPI bus (MISO, SCK and MOSI) are multiplexed (by writing to
register SPI_CTRL) between the GPIO pins (lower 3 bits of P1) and the RF transceiver
and AD subsystems. The SPI hardware does not generate any chip select signal. The
programmer will typically use GPIO bits (from port P0) to act as chip selects for one or
more external SPI devices. The EECSN pin is a general purpose IO dedicated as chip
select for the boot EEPROM. When the SPI interfaces the RF transceiver, the chip
selects are available in an internal GPIO port, P2.
1.4
Port Logic
The device has 8 general-purpose bi-directional pins (the P0 port). Additionally the 4
SPI data pins may be used as general purpose IO (the P1). Most of the GPIO pins can
be used for multiple purposes under program control. The alternate functions include
two external interrupts, UART RXD and TXD, a SPI master port, three enable/count
signals for the timers and the PWM output and a slow programmable timer. Each pin in
the P0 port can be programmed for high sink or source current.
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