參數(shù)資料
型號: NRF9E5-EVKIT433
廠商: Electronic Theatre Controls, Inc.
英文描述: 433/868/915MHz RF Transceiver with Embedded 8051 Compatible Microcontroller and 4 Input, 10 Bit ADC
中文描述: 433/868/915MHz RF收發(fā)器與8051兼容的嵌入式微控制器和4輸入,10位ADC
文件頁數(shù): 29/104頁
文件大?。?/td> 1436K
代理商: NRF9E5-EVKIT433
PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989
Revision: 1.1
Page 29 of 104
June 2004
10
AD CONVERTER SUBSYSTEM
10.1
AD Converter
The nRFE5 AD converter has 10 bit dynamic range and linearity when used at the
Nyquist rate. With lower signal frequencies and post filtering, up to 12 bits resolution is
possible. The reference for the AD converter is selectable between the AREF input and
an internal 1.22V bandgap reference.
The converter default SPI setting is 10 bits. For special requirements, the AD converter
can be configured to perform 6, 8, 10 or 12 bit conversions. The converter may also be
used in differential mode with AIN0 used as inverting input and one of the other 3
external inputs used as noninverting input.
Two
ADC_DATA_REG. AD converter status bit are available in the STATUS_REGISTER.
Registers are described in detail in chapter 11.
registers
interface
the
AD
converter,
ADC_CONFIG_REG
and
Selection of input channel is directly embedded in the START_ADC_CONV command,
alternatively it is set by CHSEL in the ADC_CONFIG_REG. Values of CHSEL from 0
to 3 would select AIN0 to AIN3 respectively. Setting CHSEL to [1xxx] will monitor the
nRF9E5 supply voltage by converting an internal input that is VDD/3 with the 1.22V
internal reference.
The AD conversion result is available as ADCDATA in ADC_DATA_REG at the end
of conversion. The data in ADC_DATA_REG is stored according to Table 19 with left
or right justified data selected by ADC_RL_JUST.
ADC_DATA_REG[15:0]
High byte [15:8]
ADCDATA[5:0]
ADCDATA[7:0]
ADCDATA[9:0]
ADCDATA[11:0]
ADC_
RL_JUST
0
0
0
0
1
1
1
1
ADC
_RESCTRL
00
01
10
11
00
01
10
11
Table 19 ADC_DATA_REGISTER justified data.
# bit
Low byte [7:0]
6
8
10
12
6
8
10
12
‘0’
ADCDATA[5:0]
ADCDATA[7:0]
ADCDATA[9:0]
ADCDATA[11:0]
‘0’
Overflow status is stored as ADC_RFLAG in the STATUS_REGISTER after each
conversion.
The complete subsystem is switched off by clearing bit ADC_PWR_UP.
Instructions for the AD converter are given in Table 21 on page 35.
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