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參數(shù)資料
| 型號： | NAND512W4B2BN6T |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | PROM |
| 英文描述： | 32M X 16 FLASH 3V PROM, 25000 ns, PDSO48 |
| 封裝： | 12 X 20 MM, PLASTIC, TSOP-48 |
| 文件頁數(shù)： | 11/58頁 |
| 文件大小： | 943K |
| 代理商： | NAND512W4B2BN6T |
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NAND512-B, NAND01G-B, NAND02G-B, NAND04G-B, NAND08G-B
DEVICE OPERATIONS
The following section gives the details of the de-
vice operations.
Read Memory Array
At Power-Up the device defaults to Read mode.
To enter Read mode from another mode the Read
command
must
be
issued,
see
10., Commands. Once a Read command is is-
sued, subsequent consecutive Read commands
only require the confirm command code (30h).
Once a Read command is issued two types of op-
erations are available: Random Read and Page
Read.
Random Read. Each time the Read command is
issued the first read is Random Read.
Page Read. After the first Random Read access,
the page data (2112 Bytes or 1056 Words) is
transferred to the Page Buffer in a time of tWHBH
(refer to Table 24. for value). Once the transfer is
complete the Ready/Busy signal goes High. The
data can then be read out sequentially (from se-
lected column address to last column address) by
pulsing the Read Enable signal.
The device can output random data in a page, in-
stead of the consecutive sequential data, by issu-
ing a Random Data Output command.
The Random Data Output command can be used
to skip some data during a sequential data output.
The sequential operation can be resumed by
changing the column address of the next data to
be output, to the address which follows the Ran-
dom Data Output command.
The Random Data Output command can be is-
sued as many times as required within a page.
The Random Data Output command is not accept-
ed during Cache Read operations.
Figure 9. Read Operations
Note: 1. Highest address depends on device density.
CL
E
W
AL
R
I/O
RB
00h
ai08657b
Busy
Command
Code
Data Output (sequentially)
Address Input
tBLBH1
30h
Command
Code
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| NAND512R4A2CZB6E | 32M X 16 FLASH 1.8V PROM, 35 ns, PBGA55 |
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