參數(shù)資料
型號(hào)： NAND512R4A2CZD6E
廠商： NUMONYX
元件分類： PROM
英文描述： 32M X 16 FLASH 1.8V PROM, 15000 ns, PBGA55
封裝： 8 X 10 MM, 1 MM HEIGHT, ROHS COMPLIANT, VFBGA-55
文件頁(yè)數(shù)： 13/55頁(yè)
文件大小： 1377K
代理商： NAND512R4A2CZD6E
Command set
NAND512-A2C
5
Command set
All bus write operations to the device are interpreted by the command interface. The
commands are input on I/O0-I/O7 and are latched on the rising edge of Write Enable when
the Command Latch Enable signal is High. Device operations are selected by writing
specific commands to the command register. The two-step command sequences for
program and erase operations are imposed to maximize data security.
The commands are summarized in Table 9.
Table 9.
Commands
Command
Bus write operations(1)(2)
1.
The bus cycles are only shown for issuing the codes. The cycles required to input the addresses or
input/output data are not shown.
2.
Any undefined command sequence is ignored by the device.
Command
accepted during
busy
1st cycle
2nd cycle
3rd cycle
Read A
00h
–
Read B(3)
3.
The Read B command (code 01h) is not used in x16 devices.
01h
–
Read C
50h
–
Read Electronic Signature
90h
–
Read Status Register
70h
–
Yes
Page Program
80h
10h
–
Copy Back Program
00h
8Ah
(10h)(4)
4.
The Program Confirm command (code 10h) is no more necessary for NAND512-A2C devices. It is optional
and has been maintained for backward compatibility.
Block Erase
60h
D0h
–
Reset
FFh
–
Yes
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