參數(shù)資料
型號: NAND128W4A3AN6E
廠商: STMICROELECTRONICS
元件分類: PROM
英文描述: 8M X 16 FLASH 3V PROM, 10000 ns, PDSO48
封裝: 12 X 20 MM, LEAD FREE, PLASTIC, TSOP-48
文件頁數(shù): 24/56頁
文件大?。?/td> 882K
代理商: NAND128W4A3AN6E
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
30/56
Figure 22. Bad Block Management Flowchart
Figure 23. Garbage Collection
Garbage Collection
When a data page needs to be modified, it is faster
to write to the first available page, and the previous
page is marked as invalid. After several updates it
is necessary to remove invalid pages to free some
memory space.
To free this memory space and allow further pro-
gram operations it is recommended to implement
a Garbage Collection algorithm. In a Garbage Col-
lection software the valid pages are copied into a
free area and the block containing the invalid pag-
es is erased (see Figure 23.).
Wear-leveling Algorithm
For write-intensive applications, it is recommend-
ed to implement a Wear-leveling Algorithm to
monitor and spread the number of write cycles per
block.
In memories that do not use a Wear-Leveling Al-
gorithm not all blocks get used at the same rate.
Blocks with long-lived data do not endure as many
write cycles as the blocks with frequently-changed
data.
The Wear-leveling Algorithm ensures that equal
use is made of all the available write cycles for
each block. There are two wear-leveling levels:
AI07588C
START
END
NO
YES
NO
Block Address =
Block 0
Data
= FFh?
Last
block?
Increment
Block Address
Update
Bad Block table
Valid
Page
Invalid
Page
Free
Page
(Erased)
Old Area
AI07599B
New Area (After GC)
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