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參數(shù)資料
| 型號： | MX98728 |
| 英文描述： | GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION |
| 中文描述： | GMAC的單芯片10/100快速以太網(wǎng)控制器的一般應(yīng)用程序 |
| 文件頁數(shù)： | 15/71頁 |
| 文件大?。?/td> | 389K |
| 代理商： | MX98728 |
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15
P/N:PM0723
REV. 1.0, JUL. 13, 2000
MX98728EC
Boundary Page Pointer Register: BP (Reg.0Bh/0Ah), R/W, default=x000h
Bit
0A.7-0,
0B.3-0
Symbol
BP[11:0]
Description
Boundary Page Pointer between the tx/rx buffers: page TLBP[11:0] to page
BP[11:0] is the tx buffer. Page BP[11:0] to page RHBP[11:0] is the rx buffer.
BP[11:0] is mapped to MA[19:8]. The MSB is the Reg0BH.3 bit. The LSB is the
Reg0AH.0 bit.
TX Low Boundary Page Pointer Register: TLBP (Reg.0Dh/0Ch), R/W, default=x000h
Bit
0D.3-0,
Symbol
TLBP[11:0]
Description
TX Low Boundary Page Pointer : The TX packet buffer is defined as between
TLBP [11:0] and BP [11:0]. The MSB is the Reg0Dh.3 bit. The LSB is the Reg0Ch.0
bit.
Transmit Buffer Write Page Pointer Register: TWP (Reg.0Fh/0Eh), R/W, default=x000h
Bit
0E.7-0,
0F.3-0
Symbol
TWP[11:0]
Description
Transmit Buffer Write Page Pointer: TWP[11:0] are mapped to MA[19:8] with the
same bit ordering. The MSB is the Reg0Fh.3 bit. The LSB is the Reg0Eh.0 bit.
TWP is normally controlled by the device driver. An internal Byte Counter
(TWPBC) is associated with this page register.
Reserved Register: (Reg11h/10h), default=x000h
Bit
reserved
Symbol
Description
not used
Transmit Buffer Read Page Pointer Register: TRP (Reg.13h/12h), R/W, default=x000h
Bit
12.7-0,
13.3-0
Symbol
TRP[11:0]
Description
The Page Index of the Transmit Buffer Read Pointer: Current transmit read page
pointer. The MSB is the Reg13h.3 bit. The LSB is the Reg12h.0 bit. TRP is
controlled by GMAC only. An internal Byte Counter (TRPBC) is associated with
this page register.
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| MX98728AEC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Controller Miscellaneous - Datasheet Reference |
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