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參數(shù)資料
| 型號： | MX98727 |
| 英文描述： | SINGLE CHIP PCI/CARDBUS FAST ETHERNET CONTROLLER |
| 中文描述： | 單芯片的PCI / CARDBUS快速以太網(wǎng)控制器 |
| 文件頁數(shù)： | 40/71頁 |
| 文件大?。?/td> | 389K |
| 代理商： | MX98727 |
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40
P/N:PM0723
REV. 1.0, JUL. 13, 2000
MX98728EC
*Numbers in parentheses indicate field length in bytes.
The CRC polynomial, as specified in the Ethernet specification, is as follows:
FCS(X) = X
31
+ X
26
+ X
23
+ X
22
+ X
16
+ X
12
+ X
11
+ X
10
+ X
8
+ X
7
+ X
5
+ X
4
+ X
2
+ X
1
+ 1
The 32 bits of the CRC value are placed in the FCS field so that the X
31
term is the right-most bit of the first octet, and
the X
0
term is the left-most bit of the last octet. The bits of the CRC are transmitted in the order X
31
,X
30
,....X
1
,X
0
.
CRC
Type/
Length
Data
Source
Address
Destination
Address
SFD
Preamble
(7)
(1)
(6)
(2)
(46...1500)
(4)
(6)
Ethernet Frame Format
4.3 Packet Structure and 802.3 conformance
The network speed may be 10 MBPS or 100 MBPS. Further more, GMAC supports the full duplex mode where the
transmit and the receive processes are running independently. A typical Ethernet frame structure is shown below.
Ethernet and IEEE 802.3 Frames
An Ethernet frame format consists of the following:
Field
Description
Preamble
A 7-byte field of 56 alternating 1s and 0s, beginning with a 0.
SFD
Start Frame Delimiter. A 1-byte field that contains the value 10101011; the MSB is trans-
mitted and received first.
Destination
A 6-byte field that contains the specific station address, the broadcast address, or a multicast
address where this frame is directed.
Source
A 6-byte field that contains the specific station address where this frame was sent from.
Type/Length
A 2-byte field that indicates whether the frame is in IEEE 802.3 format or Ethernet format.
A field greater than 1500 is interpreted as a type field, which defines the type of protocol of
the frame. A field smaller than or equal to 1500 is interpreted as a length field, which
indicates the No. of data bytes in the frame.
Data
A data field consists of 46 to 1500 bytes that is fully transparent. Shorter than 46 bytes is
allowed.
CRC
A frame check sequence is a 32-bit cyclic redundancy check(CRC) value that is computed
as a function of the destination address field, source address field, type field and data field.
The FCS is appended to each transmitted frame, and used at reception to determine if the
receive frame is valid. The figure shows the Ethernet frame format.
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PDF描述 |
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| MX98742 | FEBC 100 Base Fast Ethernet Bridge Controller |
| MX98902A(PLCC) | LAN Node Controller |
| MX98902A(PQFP) | LAN Node Controller |
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| MX99011MC | Interface IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MX98728 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION |
| MX98728AEC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Controller Miscellaneous - Datasheet Reference |
| MX98728EC | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION |
| MX98741 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| MX98742 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FEBC 100 Base Fast Ethernet Bridge Controller |
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