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參數(shù)資料
| 型號： | MX25U8035ZUI-25G |
| 廠商： | MACRONIX INTERNATIONAL CO LTD |
| 元件分類： | PROM |
| 英文描述： | 2M X 4 FLASH 1.8V PROM, PDSO8 |
| 封裝： | 4 X 4 MM, 0.60 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, MO-252, USON-8 |
| 文件頁數(shù)： | 18/56頁 |
| 文件大?。?/td> | 2467K |
| 代理商： | MX25U8035ZUI-25G |
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25
MX25U4035
MX25U8035
P/N: PM1394
REV. 1.1, JUN. 30, 2009
last unprotected address has been reached, the chip will exit CP mode and reset write Enable Latch bit (WEL) as
"0" and CP mode bit as "0". Please check the WIP bit status if it is not in write progress before entering next valid
instruction. During CP mode, the valid commands are CP command (AD hex), WRDI command (04 hex), RDSR
command (05 hex), and RDSCUR command (2B hex). And the WRDI command is valid after completion of a CP
programming cycle, which means the WIP bit=0.
The sequence of issuing CP instruction is : CS# high to low→ sending CP instruction code→ 3-byte address on
SI→ Data Byte on SI→CS# goes high to low→ sending CP instruction......→ last desired byte programmed or send-
ing Write Disable (WRDI) instruction to end CP mode-> sending RDSR instruction to verify if CP mode is ended. (Please
refer to Figure 22 of CP mode timing waveform)
Three methods to detect the completion of a program cycle during CP mode:
1) Software method-I: by checking WIP bit of Status Register to detect the completion of CP mode.
2) Software method-II: by waiting for a tBP time out to determine if it may load next valid command or not.
3) Hardware method: by writing ESRY (enable SO to output RY/BY#) instruction to detect the completion of a pro-
gram cycle during CP mode. The ESRY instruction must be executed before CP mode instruction issuing. Once
it is enabled in CP mode, the CS# goes low will drive out the RY/BY# status on SO, "0" indicates busy stage, "1"
indicates ready stage, SO pin outputs tri-state if CS# goes high. DSRY (disable SO to output RY/BY#) instruc-
tion to disable the SO to output RY/BY# and return to status register data output during CP mode. Please note
that the ESRY/DSRY commands are not accepted unless the completion of CP mode.
(17) Deep Power-down (DP)
The Deep Power-down (DP) instruction is for setting the device on the minimizing the power consumption (to enter-
ing the Deep Power-down mode), the standby current is reduced from ISB1 to ISB2). The Deep Power-down mode
requires the Deep Power-down (DP) instruction to enter, during the Deep Power-down mode, the device is not ac-
tive and all Write/Program/Erase instruction are ignored. When CS# goes high, it's only in standby mode not deep
power-down mode. It's different from Standby mode.
The sequence of issuing DP instruction is: CS# goes low→ sending DP instruction code→CS# goes high. (Please
refer to Figure 27)
Once the DP instruction is set, all instruction will be ignored except the Release from Deep Power-down mode (RDP)
and Read Electronic Signature (RES) instruction. (Those instructions allow the ID being reading out). When Power-
down, the deep power-down mode automatically stops, and when power-up, the device automatically is in standby
mode. For RDP instruction the CS# must go high exactly at the byte boundary (the latest eighth bit of instruction
code been latched-in); otherwise, the instruction will not executed. As soon as Chip Select (CS#) goes high, a delay
of tDP is required before entering the Deep Power-down mode.
(18) Release from Deep Power-down (RDP), Read Electronic Signature (RES)
The Release from Deep Power-down (RDP) instruction is terminated by driving Chip Select (CS#) High. When Chip
Select (CS#) is driven High, the device is put in the Stand-by Power mode. If the device was not previously in the
Deep Power-down mode, the transition to the Stand-by Power mode is immediate. If the device was previously in
the Deep Power-down mode, though, the transition to the Stand-by Power mode is delayed by tRES2, and Chip
Select (CS#) must remain High for at least tRES2(max), as specified in Table 10.AC Characteristics. Once in the
Stand-by Power mode, the device waits to be selected, so that it can receive, decode and execute instructions. The
RDP instruction is only for releasing from Deep Power Down Mode.
RES instruction is for reading out the old style of 8-bit Electronic Signature, whose values are shown as table of ID
Definitions on next page. This is not the same as RDID instruction. It is not recommended to use for new design.
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