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參數(shù)資料
| 型號： | MTC50150-TB-C2 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | ADSL GATEWAY PROCESSOR |
| 中文描述： | 寬帶網(wǎng)關(guān)處理器 |
| 文件頁數(shù)： | 6/20頁 |
| 文件大小： | 151K |
| 代理商： | MTC50150-TB-C2 |
MTC50150
6/20
7.6 Session Control
7.6.1 PPPoA (RFC 2364)
PPP over ATM provides on the CPE side a termination agent for the transportation for IP packets over an
ATM segment. A PPP session is established between the CPE and the central office (DSLAM). PPP pro-
vides AAA function (authentication, authorization and accounting). The PPP packets encapsulated ac-
cording to RFC 2364 for transmission over an ATM segment. On the CPE side, the IP data can be
delivered to the end user over such technologies as Ethernet.
7.6.2 PPPoE (RFC 2516)
The PPP over Ethernet encapsulation is used to transport Ethernet PPP traffic. The traffic is then trans-
ported over the ATM link by encapsulating traffic using RFC1483/2683. There may be multiple PPP ses-
sions, each terminated in the IAD client device. PPPoE relay agent works as a enhanced layer 2 bridge.
It determines that which locally originated PPPoE traffic belongs. The relay agent forwards that traffic,
without any unnecessary processing, only to the correct destination. Similarly, received data is immedi-
ately relayed only to the appropriate LAN client.
8
The MTC50150 presents a comprehensive set of software features. To allow manufacturers to further cus-
tomize the system, a set of API functions are made available. This use of the API functions requires the
acquisition of a development environment. The development environment is based on the following ele-
ments:
DEVELOPMENT ENVIRONMENT
■
-ARM Developer Suite (ADS) v1.1
■
-ATI Development license
■
-ATI EDE (Embedded Development Environment)
■
-MS Developer Studio (VC++) v6.0 or higher
Along with the development environment a number of tools are provided to allow the diagnostic and the
downloading operation of the executable on the nonvolatile memory of the MTC50150.
9
The MTC50150 processor is available in a 208-pin PBGA (plastic ball grid array) package. All I/Os are
3.3V CMOS levels, with all inputs and 3-states having 5V tolerance. Supply voltages are 1.8 and 3.3V. No
pins have internal pull-ups and pull-downs.
NOMINAL CHARACTERISTICS
Supply
– Typical power supply voltage 1.8V
– Typical pad power supply voltage 3.3V
– Input low voltage -0.5V -1.0V
– Input high voltage 2.3V- 5.5V
– Core consumption: 1000mW, reduced power mode avail-
able.
– Ambient temperature: 0C - 70C (32F - 158F)
– Industrial grade: -40C - 85C. (-49F - 185F)
– 208-pin plastic BGA package
– CMOS 0.18 micron
Threshold
Consumption
Environment
Package
Technology
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