參數(shù)資料
型號(hào): MTD505
廠商: Electronic Theatre Controls, Inc.
英文描述: 5 Port 10M/100M Ethernet Switch
中文描述: 5端口10M/100M以太網(wǎng)交換機(jī)
文件頁(yè)數(shù): 1/19頁(yè)
文件大?。?/td> 202K
代理商: MTD505
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification
without notice. No liability is assumed as a result of the use of this procuts. No rights under any patent accompany the sales of
the product.
1/19
MTD505 Revision 1.2 14/04/2000
MTD505
(Preliminary)
MYSON
TECHNOLOGY
5 Port 10M/100M Ethernet Switch
FEATURES
GENERAL DESCRIPTION
BLOCK DIAGRAM
IEEE802.3 and IEEE802.3u compliant.
Provide 4 RMII and 1 MII/RMII ports.
Programmable 1K/8K MAC addresses filtering.
Store and forward switching function and bad
packet filtering function.
Optional back_pressure/802.3x flow control/
flooding control/broadcast control.
Optional EEPROM Interface for advanced
switch configurations.
1MB/2MB SGRAM/SDRAM flexible memory
interface.
Port VLAN/trunking.
Link/Rx activity, packet buffer utilization LED
display.
50MHz for non-blocking for 5 ports switch oper-
ation
Build in internal/external memory test function.
128 pin PQFP package, 3.3V operation volt-
age.
The MTD505 complies fully with the
IEEE802.3, 802.3u and 802.3x specifications and
is a non-blocking 5 port 10M/100M Ethernet
switch device.
Support 4 RMII and 1 MII/RMII ports for
10M/100M operation. 1MByte/2MBytes memory
interface provides maximum 1365 packet buffers
for Ethernet packet buffering. Up to 8192 address
entrys are provided by the MTD505, and the
MTD505 use full Ethernet address compare algo-
rithm to minimize hashing collision events.
The MTD505 provides EEPROM interface
to config port trunking, port VLAN, static entry,
802.3x flow control threshold, flooding port,
broadcast control threshold. Each MTD505 port
support 10/100M auto-negotiation by MDC/MDIO
interface for connecting external PHY devices.
The MTD505 also provides 10 pins for
Link/RX activity, packet buffer utilization LED dis-
play function.
SDRAM/
SGRAM
Interface
Port
Switch
Logic
RMII/MII4
MAC4
DMA4
RMII3
MAC3
DMA3
RMII0
MAC0
DMA0
RMII1
MAC1
DMA1
RMII2
MAC2
DMA2
Memory
Arbiter
Memory
Controller
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