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參數(shù)資料
| 型號(hào)： | MT9076 |
| 廠(chǎng)商： | Mitel Networks Corporation |
| 英文描述： | T1/E1/J1 3.3V Single Chip Transceiver(T1/E1/J1 3.3V 單片收發(fā)器) |
| 中文描述： | T1/E1/J1收發(fā)3.3V的單芯片收發(fā)器（T1/E1/J1收發(fā)3.3單片收發(fā)器） |
| 文件頁(yè)數(shù)： | 65/162頁(yè) |
| 文件大?。?/td> | 427K |
| 代理商： | MT9076 |
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Preliminary Information
MT9076
61
Bit
Name
Functional Description
7
EDL
Enable Data Link
. Setting this bit multiplexes the serial stream clocked in on pin TxDL into
the FDL bit position (ESF mode) or the Fs position (D4 mode).
6
BIOMEn
Bit Oriented Messaging Enable
. Setting this bit enables transmission of bit - oriented
messages on the ESF facility data link. The actual message transmit at any one time is
contained in the BIOMTx register (page 1, address 13H). The receive bit - oriented message
register is always active, although the interrupt associated with it may be masked.
5
EXZ
Excess Zeros.
Setting this bit causes each occurance of received excess zeros to increment
the Line Code Violation Counter. Excess zeros are defined as 8 or more successive zeros for
B8ZS encoded data, or 16 or more successive zeros for non-B8ZS encoded data.
4
TxPDVS
Transmit Pulse Density Violation Screen.
Setting this bit causes ones to be injected into
the transmit data in the event that a violation of the ones density requirement is detected in
the outgoing data.
3
TxSYNC
Transmit Synchronization
. Setting this bit causes the transmit multiframe boundary to be
internally synchronized to the incoming Sbits on DSTi channel 31 bit 0.
2
TRSP
Transparent Mode
. Setting this bit causes unframed data to be transmit from DSTi channels
0 to 23 and channel 31 bit 7 to be transmit transparently onto the DS1 line. Unframed data
received from the DS1 line is piped out on DSTo channels 0 to 23 and channel 31 bit 0.
1
JTS
Japan Telecom Synchronization
. Setting this bit forces the inclusion of Sbits in the CRC-6
calculation.
0
H1R64
HDLC Rate Select
. Setting this pin high while an HDLC is activated on a timeslot enables 64
Kb/s operation. Setting this pin low while an HDLC is activated enables 56 Kb/s operation (this
prevents data corruption due to forced bit stuffing).
Table 23 - Data Link Control Word (T1)
(Page 1, Address 12H)
Bit
Name
Functional Description
7 - 0
BIOMTx7-0
Transmit Bit Oriented Message
. The contents of this register are concatenated with a
sequence of eight 1’s and continuously transmit in the FDL bit position of ESF trunks.
Normally the leading bit (bit 7) and last bit (bit 0) of this register are set to zero.
Table 24 - Transmit Bit Oriented Message (T1)
(Page 1, Address 13H)
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PDF描述 |
|---|---|
| MT9079 | Advanced Controller for E1(先進(jìn)的E1幀調(diào)節(jié)器和控制器) |
| MT9080B | SMX - Switch Matrix Module(用于消費(fèi)類(lèi)轉(zhuǎn)換應(yīng)用的開(kāi)關(guān)矩陣模塊) |
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| MT90840AK | Distributed Hyperchannel Switch |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9076AB | 制造商:MITEL 制造商全稱(chēng):Mitel Networks Corporation 功能描述:T1/E1/J1 3.3V Single Chip Transceiver |
| MT9076AP | 制造商:MITEL 制造商全稱(chēng):Mitel Networks Corporation 功能描述:T1/E1/J1 3.3V Single Chip Transceiver |
| MT9076B | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:T1/E1/J1 3.3 V Single Chip Transceiver |
| MT9076BB | 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays |
| MT9076BB1 | 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays |
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