- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383645 > MT9076 (Mitel Networks Corporation) T1/E1/J1 3.3V Single Chip Transceiver(T1/E1/J1 3.3V 單片收發(fā)器) PDF資料下載
參數(shù)資料
| 型號： | MT9076 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | T1/E1/J1 3.3V Single Chip Transceiver(T1/E1/J1 3.3V 單片收發(fā)器) |
| 中文描述： | T1/E1/J1收發(fā)3.3V的單芯片收發(fā)器（T1/E1/J1收發(fā)3.3單片收發(fā)器） |
| 文件頁數(shù)： | 34/162頁 |
| 文件大?。?/td> | 427K |
| 代理商： | MT9076 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當(dāng)前第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁
MT9076
Preliminary Information
30
Table 12 - Operation of AUTC, ARAI and TALM Control Bits (E1 Mode)
3.3.3
The purpose of the signaling multiframing algorithm is to provide a scheme that will allow the association of a
specific ABCD signaling nibble with the appropriate PCM 30 channel. Time slot 16 is reserved for the
communication of Channel Associated signaling (CAS) information (i.e., ABCD signaling bits for up to 30
channels). Refer to ITU-T G.704 and G.732 for more details on CAS multiframing requirements.
CAS Signaling Multiframing in E1 mode
A CAS signaling multiframe consists of 16 basic frames (numbered 0 to 15), which results in a multiframe
repetition rate of 2 msec. It should be noted that the boundaries of the signaling multiframe may be completely
distinct from those of the CRC-4 multiframe. CAS multiframe alignment is based on a multiframe alignment
signal (a 0000 bit sequence), which occurs in the most significant nibble of time slot 16 of basic frame 0 of the
CAS multiframe. Bit 6 of this time slot is the multiframe alarm bit (usually designated Y). When CAS
multiframing is acquired on the receive side, the transmit Y-bit is zero; when CAS multiframing is not acquired,
the transmit Y-bit is one. Bits 5, 7 and 8 (usually designated X) are spare bits and are normally set to one if not
used.
Time slot 16 of the remaining 15 basic frames of the CAS multiframe (i.e., basic frames 1 to 15) are reserved
for the ABCD signaling bits for the 30 payload channels. The most significant nibbles are reserved for channels
1 to 15 and the least significant nibbles are reserved for channels 16 to 30. That is, time slot 16 of basic frame
1 has ABCD for channel 1 and 16, time slot 16 of basic frame 2 has ABCD for channel 2 and 17, through to
time slot 16 of basic frame 15 has ABCD for channel 15 and 30.
4.0
MT9076 Access and Control
4.1
The Control Port Interface
The control and status registers of the MT9076 are accessible through a non-multiplexed parallel
microprocessor port. The parallel port may be configured for Motorola style control signals (by setting pin INT/
MOT low) or Intel style control signals (by setting pin INT/MOT high).
AUTC
ARAI
TALM
Description
0
0
X
Automatic CRC-interworking is activated. If no valid CRC MFAS is being received,
transmit RAI will flicker high with every reframe (8msec.), this cycle will continue
for 400 msec., then transmit RAI will be low continuously. The device will stop
searching for CRC MFAS, continue to transmit CRC-4 remainders, stop CRC-4
processing, indicate CRC-to-non-CRC operation and transmit E-bits to be the
same state as the TE control bit (page 01H, address 16H).
0
1
0
Automatic CRC-interworking is activated. Transmit RAI is low continuously.
0
1
1
Automatic CRC-interworking is activated. Transmit RAI is high continuously.
1
0
X
Automatic CRC-interworking is de-activated. If no valid CRC MFAS is being
received, transmit RAI flickers high with every reframe (8 msec.), this cycle
continues for 400 msec, then transmit RAI becomes high continuously. The
device continues to search for CRC MFAS and transmit E-bits are the same state
as the TE control bit. When CRCSYN = 0, the CRC MFAS search is terminated
and the transmit RAI goes low.
1
1
0
Automatic CRC-interworking is de-activated. Transmit RAI is low continuously.
1
1
1
Automatic CRC-interworking is de-activated. Transmit RAI is high continuously.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT9079 | Advanced Controller for E1(先進(jìn)的E1幀調(diào)節(jié)器和控制器) |
| MT9080B | SMX - Switch Matrix Module(用于消費(fèi)類轉(zhuǎn)換應(yīng)用的開關(guān)矩陣模塊) |
| MT90810 | Flexible MVIP(Multi-Vendor Integration Protocol) Interface Circuit(彈性MVIP接口電路) |
| MT90812 | Integrated Digital Switch (IDX)(集成數(shù)字開關(guān)) |
| MT90840AK | Distributed Hyperchannel Switch |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9076AB | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:T1/E1/J1 3.3V Single Chip Transceiver |
| MT9076AP | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:T1/E1/J1 3.3V Single Chip Transceiver |
| MT9076B | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1/J1 3.3 V Single Chip Transceiver |
| MT9076BB | 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays |
| MT9076BB1 | 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。