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參數(shù)資料
| 型號： | MT9076 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | T1/E1/J1 3.3V Single Chip Transceiver(T1/E1/J1 3.3V 單片收發(fā)器) |
| 中文描述： | T1/E1/J1收發(fā)3.3V的單芯片收發(fā)器（T1/E1/J1收發(fā)3.3單片收發(fā)器） |
| 文件頁數(shù)： | 122/162頁 |
| 文件大小： | 427K |
| 代理商： | MT9076 |
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MT9076
Preliminary Information
118
Bit
Name
Functional Description
7
RAI
Remote Alarm Indication
. This bit is set to one in the event of receipt of a remote alarm,
i.e. A(RAI) = 1. It is cleared when the register is read.
6
AIS
Alarm Indication Signal.
This bit is set to one in the event of receipt of an all ones alarm.
It is cleared when the register is read.
5
AIS16
AIS Time Slot 16 Alarm
. This bit is set to one in the event of receipt of an all ones alarm
in the time slot 16. It is cleared when the register is read.
4
LOS
Loss of Signal
. This bit is set to one in the event of loss of received signal. It is cleared
when the register is read.
3
AUXP
Auxiliary Alarm.
This bit is set to one in the event of receipt of the auxiliary alarm pattern.
It is cleared when the register is read.
2
MFALM
Multiframe Alarm
. This bit is set to one in the event of receipt of a multiframe alarm. It is
cleared when the register is read.
1
RSLIP
Received Slip
. This bit is set to one in the event of receive elastic buffer slip. It is cleared
when the register is read.
0
- - -
Unused
.
Table 136 - Alarm Reporting Latch
(Page 4, Address 12H) (E1)
Bit
Name
Functional Description
7 - 0
EFAS7 - 0
Errored FAS Counter
. An 8 bit counter that is incremented once for every receive
frame alignment signal that contains one or more errors.
Table 137 - Errored Frame Alignment Signal Counter
(Page 4, Address 13H) (E1)
Bit
Name
Functional Description
1-0
EC15-8
E bit Error Counter. The most significant bits of the E bit error counter.
Table 138 - E-bit Error Counter
(Page 4, Address 14H) (E1)
Bit
Name
Functional Description
7 - 0
EC7-0
E bit Error Counter.
The least significant 8 bits of the E-bit error counter.
Table 139 - E-bit Error Counter
(Page 4, Address 15H) (E1)
Bit
Name
Functional Description
7 - 0
LCV15 - 8
Most Significant Bits of the LCV Counter.
The most significant eight bits of a 16 bit
counter that is incremented once for every line code violation received. A line code is
defined as a bipolar violation that is not a part of HDB3 encoding where the control bit
EXZ is set low. Where EXZ is set high a violation is defined as either a non-HDB3 bipolar
violation or an occurrance of excess zeros.
Table 140 - Most Significant Bits of the LCV Counter
(Page 4, Address 16H) (E1)
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PDF描述 |
|---|---|
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| MT9080B | SMX - Switch Matrix Module(用于消費類轉換應用的開關矩陣模塊) |
| MT90810 | Flexible MVIP(Multi-Vendor Integration Protocol) Interface Circuit(彈性MVIP接口電路) |
| MT90812 | Integrated Digital Switch (IDX)(集成數(shù)字開關) |
| MT90840AK | Distributed Hyperchannel Switch |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MT9076AB | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:T1/E1/J1 3.3V Single Chip Transceiver |
| MT9076AP | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:T1/E1/J1 3.3V Single Chip Transceiver |
| MT9076B | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1/J1 3.3 V Single Chip Transceiver |
| MT9076BB | 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays |
| MT9076BB1 | 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays |
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