參數(shù)資料
型號: MT8LLN22NCNE
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, PBGA316
封裝: 27 X 27 MM, PLASTIC, BGA-316
文件頁數(shù): 94/145頁
文件大?。?/td> 2285K
代理商: MT8LLN22NCNE
Coppertail Product Specification
MT8LLN22NCNE.fm – Rev. 1, Pub. 2/02
52
2002, Micron Technology Inc.
PRELIMINARY
MT8LLN22NCNE
COPPERTAIL
Master Latency Timer (Device 7h, Function 2h)
Header Type (Device 7h, Function 2h)
BIST (Device 7h, Function 2h)
Base Address Register 0 - IDE Primary CS0 (Device 7h, Function 2h)
ADDRESS: 0Dh
SYMBOL: LAT_TMR
BITS
DESCRIPTION
PROPERTIES
RESET
7:0
Latency Timer. Not supported.
R/O
00h
ADDRESS: 0Eh
SYMBOL: HTYPE
BITS
DESCRIPTION
PROPERTIES
RESET
7:0
Indicates the standard layout for the PCI enumeration area of a multi-
function device.
R/O
00h
ADDRESS: 0Fh
SYMBOL: BIST
BITS
DESCRIPTION
PROPERTIES
RESET
7:0
BIST. Not supported.
R/O
00h
ADDRESS: 10h-13h
SYMBOL: IDE_BAR0
BITS
DESCRIPTION
PROPERTIES
RESET
31:3
Beginning of 8 byte I/O address range used to define the base address
for the primary channel IDE command registers. These bits correspond
to ADDR[15:3]. This address range must fall within the I/O address
range defined in one of the PCI I/O range registers.
R/W
00000000h
2
Always returns zero because range is 8 bytes.
R/O
0
1
Reserved.
R/O
0
I/O Space Indicator
R/O
1
Base Address Register 1 - IDE Primary CS1 (Device 7h, Function 2h)
ADDRESS: 14h-17h
SYMBOL: IDE_BAR1
BITS
DESCRIPTION
PROPERTIES
RESET
31:3
Beginning of 8 byte I/O address range used to define the base address
for the primary channel IDE control block registers. These bits corre-
spond to ADDR[15:3]. This address range must fall within the I/O
address range defined in one of the PCI I/O range registers.
R/W
00000000h
2
Always returns zero because range is 8 bytes.
R/O
0
1
Reserved.
R/O
0
I/O Space Indicator
R/O
1
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