參數(shù)資料
型號: MT8LLN22NCNE
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, PBGA316
封裝: 27 X 27 MM, PLASTIC, BGA-316
文件頁數(shù): 21/145頁
文件大?。?/td> 2285K
代理商: MT8LLN22NCNE
Coppertail Product Specification
MT8LLN22NCNE.fm – Rev. 1, Pub. 2/02
117
2002, Micron Technology Inc.
PRELIMINARY
MT8LLN22NCNE
COPPERTAIL
I/O APIC Memory Mapped Register Set
The I/O APIC fixed memory mapped register set is
summarized in Table 19.
I/O APIC Index
I/O APIC Data Port
IRQ Pin Assertion
EOI Register
Table 19
IO APIC Register Set
REGISTER
ADDRESS
DESCRIPTION
I/O APIC Index port
FEC0_0000h
Provides the index of the register to be to the I/O APIC
data port
I/O APIC Data port
FEC0_0010h
Data port used in conjunction with the I/O APIC Index
port.
IRQ pin assertion
FEC0_0020h
Writes to this register will set the Delivery Status for the
interrupt specified.
EOI register
FEC0_0040h
Writes to this register will End-Of-Interrupt (EOI) the spec-
ified interrupt.
ADDRESS: FEC0_0000h
BITS
DESCRIPTION
PROPERTIES
RESET
7:0
The index address to the registers within the I/O APIC.
R/W
0
ADDRESS: FEC0_0010h
BITS
DESCRIPTION
PROPERTIES
RESET
31:0
The data port to the registers within the I/O APIC
R/W
0
ADDRESS: FEC0_0020h
BITS
DESCRIPTION
PROPERTIES
RESET
31:0
Writes to this register will set the Delivery Status for the interrupt entry
specified. (Valid range 00h-27h)
WO
0
ADDRESS: FEC0_0040h
BITS
DESCRIPTION
PROPERTIES
RESET
31:0
Writes to this register will End-Of-Interrupt (EOI) the specified interrupt,
and clear the Remote IRR bit.
WO
0
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