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| 型號(hào)： | MT8LLN22NCNE |
| 元件分類(lèi)： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA316 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-316 |
| 文件頁(yè)數(shù)： | 137/145頁(yè) |
| 文件大?。?/td> | 2285K |
| 代理商： | MT8LLN22NCNE |
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Coppertail Product Specification
MT8LLN22NCNE.fm – Rev. 1, Pub. 2/02
91
2002, Micron Technology Inc.
PRELIMINARY
MT8LLN22NCNE
COPPERTAIL
NOTE: 1. Field is standby powered and unaffected by SB_POWEROK or P_RST#. Reset only with RSMRST#.
8
PWRBTN_STS. Power Button Status. This bit is if the
PWR_BUTTON# is asserted for more than 16ms. If the
PWRBTN_EN bit is set then the setting of PWRBTN_STS will
generate a SCI, SMI#, or resume event. If STS is set in SOFF or
sleeping states, then a wake-up event is raised regardless of
PWRBTN_EN. ACPI defines optional unconditional transition
from G0 to G2/S5 called PWR_BTN Override. If
PWR_BUTTON# is held for more than 4 seconds, this bit is
cleared by hardware and transitions to G2/S5 state uncondi-
tionally.
R/WOTC
0
1
7:6
Reserved.
R/O
00
5
GBL_STS. Global Status. Set for an SCI to be generated due to
BIOS wanting attention of SCI handler. This bit is set in
response to BIOS releasing control of global lock (BIOS_RLS)
and having seen pending bit set.
R/WOTC
0
1
4
BM_STS. Bus Master Status Bit. Set when a PCI bus master
requests the bus. This bit reflects bus master activity not CPU
activity, and monitors any bus master that can cause an inco-
herent cache for a CPU in C3 state.
R/WOTC
0
1
3:1
Reserved.
R/W
000
0
TMR_STS. Timer Carry status bit. For the 24/32-bit timer, Set
anytime the timer MSB transitions from HIGH to a LOW, or
LOW to a HIGH.
When TMR_STS and TMR_EN are set, an interrupt event is
raised, (every 2.3435 seconds for 24-bit timers.)
Timer stalled outside S0, and S1.
R/WOTC
0
1
Power Management 1 Enable Register
ADDRESS: ACPI_BASE + 02h
SYMBOL: PM1_EN
BITS
DESCRIPTION
PROPERTIES
RESET
NOTES
15:11
Reserved.
R/O
000b
10
RTC_EN. RTC Enable. Enables RTC_STS to raise an SCI, SMI, or
wake up event.
R/W
0
1
9
Reserved.
R/O
0
8
PWRBTN_EN. Power Button Enable. Enables PWRBTN_STS to
raise an SCI or SMI.
R/W
0
1
7:6
Reserved.
R/O
00b
5
GBL_EN. Global Enable. When GBL_EN and GBL_STS are set,
an SCI is raised.
R/W
0
1
Power Management 1 Status Register (continued)
ADDRESS: ACPI_BASE + 00h
SYMBOL: PM1_STS
BITS
DESCRIPTION
PROPERTIES
RESET
NOTES
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT8LLN22NCNE-A | 制造商:Micron Technology Inc 功能描述:COPPERTAIL CHIPSET - Trays |
| MT8LLN22NCNE-A2 | 制造商:Micron Technology Inc 功能描述:COPPERTAIL CHIPSET AND MOTHERBOARD - Trays |
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