
Coppertail Product Specification
MT8LLN22NCNE.fm – Rev. 1, Pub. 2/02
108
2002, Micron Technology Inc.
PRELIMINARY
MT8LLN22NCNE
COPPERTAIL
Standby General Purpose I/O Status
NOTE:
Register is standby powered and unaffected by SB_POWEROK or P_RST#. Reset only with RSMRST#.
Standby General Purpose I/O Event Enable
NOTE:
Register is standby powered and unaffected by SB_POWEROK or P_RST#. Reset only with RSMRST#.
Standby General Purpose I/O Input Value
NOTE:
Register is standby powered and unaffected by SB_POWEROK or P_RST#. Reset only with RSMRST#.
Standby General Purpose I/O Input Polarity Sense
NOTE:
Register is standby powered and unaffected by SB_POWEROK or P_RST#. Reset only with RSMRST#.
Standby General Purpose I/O Output Value
NOTE:
Register is standby powered and unaffected by SB_POWEROK or P_RST#. Reset only with RSMRST#.
ADDRESS: ACPI_BASE + 80h
SYMBOL: SGPIO_STS
BITS
DESCRIPTION
PROPERTIES
RESET
15:0
GPIO_VAUX[15:0] Status. When a bit corresponding to a GPIO_VAUX is
set, the GPIO_VAUX event has occurred.
R/WOTC
0
ADDRESS: ACPI_BASE + 82h
SYMBOL: SGPIO_EVT_EN
BITS
DESCRIPTION
PROPERTIES
RESET
15:0
GPIO_VAUX[15:0] Event Enable. When a bit corresponding to a
GPIO_VAUX is set, the GPIO_VAUX event is enabled and will set GPSTS0
bit 8. When a bit corresponding to a GPIO_VAUX is clear, the GPIO_VAUX
event is disabled.
R/W
0
ADDRESS: ACPI_BASE + 84h
SYMBOL: SGPIO_IN_VAL
BITS
DESCRIPTION
PROPERTIES
RESET
15:0
GPIO_VAUX[15:0] Input value. Each bit represents the input value of a
corresponding GPIO_VAUX.
R/O
0
ADDRESS: ACPI_BASE + 86h
SYMBOL: SGPIO_POLSNS
BITS
DESCRIPTION
PROPERTIES
RESET
15:0
GPIO_VAUX[15:0] Sense. When a bit corresponding to a GPIO_VAUX is
set, the GPIO_VAUX event sense is active high. When a bit corresponding
to a GPIO_VAUX is clear, the GPIO_VAUX event sense is active low.
R/W
0
ADDRESS: ACPI_BASE + 88h
SYMBOL: SGPIO_OUT_VAL
BITS
DESCRIPTION
PROPERTIES
RESET
15:0
GPIO_VAUX[15:0] Output Value. Each bit represents the output value of
a corresponding GPIO_VAUX. This value will appear on the GPIO_VAUX
output pin when enabled.
R/W
0