capacitors are" />
參數(shù)資料
型號: MSC8256TVT1000B
廠商: Freescale Semiconductor
文件頁數(shù): 57/70頁
文件大?。?/td> 0K
描述: IC DSP 6 CORE 1GHZ 783FCPBGA
標(biāo)準(zhǔn)包裝: 1
系列: StarCore
類型: SC3850 內(nèi)核
接口: 以太網(wǎng),I²C,PCI,RGMII,串行 RapidIO,SGMII,SPI,UART/USART
時鐘速率: 1.0GHz
非易失內(nèi)存: ROM(96 kB)
芯片上RAM: 576kB
電壓 - 輸入/輸出: 2.50V
電壓 - 核心: 1.00V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 783-FCPBGA(29x29)
包裝: 托盤
MSC8256 Six-Core Digital Signal Processor Data Sheet, Rev. 6
Hardware Design Considerations
Freescale Semiconductor
60
capacitors are connected from SRn_PLL_AVDD to the ground plane. Use ceramic chip capacitors with the highest possible
self-resonant frequency. All trances should be kept short, wide, and direct.
3.3
Clock and Timing Signal Board Layout Considerations
When laying out the system board, use the following guidelines:
Keep clock and timing signal paths as short as possible and route with 50
Ω impedance.
Use a serial termination resistor placed close to the clock buffer to minimize signal reflection. Use the following
equation to compute the resistor value:
Rterm = Rim – Rbuf
where Rim = trace characteristic impedance
Rbuf = clock buffer internal impedance.
3.4
SGMII AC-Coupled Serial Link Connection Example
Figure 39 shows an example of a 4-wire AC-coupled serial link connection. For additional layout suggestions, see AN3556
MSC815x High Speed Serial Interface Hardware Design Considerations, available on the Freescale website or from your local
sales office or representative.
Figure 38. SerDes PLL Supplies
Figure 39. 4-Wire AC-Coupled SGMII Serial Link Connection Example
1
Ω
2.2
μF
2.2
μF
0.003
μF
SRn_PLL_AVDD
SRn_PLL_AGND
as short as possible
GNDSXC
VDDSXC
SGMII
SerDes Interface
50
Ω
50
Ω
Transmitter
SR[1–2]_TX[[1–2]
SR[1–2]_RX[1–2]
SR[1–2]_TX[1–2]
SR[1–2]_RX[1–2]
Receiver
CTX
50
Ω
50
Ω
SR[1–2]_RX[1–2]
SR[1–2]_RX[1–2]]
Receiver
Transmitter
SR[1–2]_TX[1–2
]
SR[1–2]_TX[1–2]
CTX
50
Ω
50
Ω
50
Ω
50
Ω
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