參數(shù)資料
型號: MPC973
廠商: Motorola, Inc.
英文描述: LOW VOLTAGE PLL CLOCK DRIVER
中文描述: 低壓PLL時鐘驅(qū)動器
文件頁數(shù): 5/14頁
文件大小: 182K
代理商: MPC973
MPC972 MPC973
TIMING SOLUTIONS
BR1333 — Rev 6
5
MOTOROLA
ABSOLUTE MAXIMUM RATINGS*
Symbol
Parameter
Min
Max
Unit
VCC
VI
IIN
TStor
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is not
implied.
Supply Voltage
–0.3
4.6
V
Input Voltage
–0.3
VDD + 0.3
±
20
V
Input Current
mA
Storage Temperature Range
–40
125
°
C
DC CHARACTERISTICS
(Note 4.; TA = 10
°
to 70
°
C; VCC = 3.3V
±
5%)
Symbol
Characteristic
Min
Typ
Max
Unit
Condition
VIH
VIL
VPP
VCMR
VOH
VOL
IIN
ICC
ICCA
CIN
Cpd
1. VCMR is the difference from the most positive side of the differential input signal. Normal operation is obtained when the “High” input is within
the VCMR range and the input lies within the VPP specification.
2. The MPC972/973 outputs can drive series or parallel terminated 50
(or 50
to VCC/2) transmission lines on the incident edge (see Applications
Info section).
3. Inputs have pull–up/pull–down resistors which affect input current.
4. Special thermal handling may be required in some configurations.
Input HIGH Voltage
2.0
3.6
V
Input LOW Voltage
0.8
V
Peak–to–Peak Input Voltage
PECL_CLK
300
1000
mV
Common Mode Range
PECL_CLK
VCC–2.0
2.4
VCC–0.6
Note 1.
Output HIGH Voltage
V
IOH = –20mA (Note 2.)
IOL = 20mA (Note 2.)
Note 3.
Output LOW Voltage
0.5
V
Input Current
±
120
μ
A
Maximum Quiescent Supply Current
190
215
mA
All VCC PIns
Analog VCC Current
Input Capacitance
15
20
mA
4
pF
Power Dissipation Capacitance
25
pF
Per Output
PLL INPUT REFERENCE CHARACTERISTICS
(TA = 10
°
to 70
°
C)
Symbol
Characteristic
Min
Max
Unit
Condition
tr, tf
fref
frefDC
txtal
5. Maximum input reference frequency is limited by the VCO lock range and the feedback divider or 100MHz, minimum input reference frequency
is limited by the VCO lock range and the feedback divider.
6. See Applications Info section for more crystal information.
TCLK Input Rise/Falls
3.0
ns
Reference Input Frequency
Note 5.
100, Note 5.
MHz
Note 5.
Reference Input Duty Cycle
25
75
%
Crystal Oscillator Frequency
10
25
MHz
Note 6.
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