參數(shù)資料
型號(hào): MPC603RVG300LC
廠商: Freescale Semiconductor
文件頁數(shù): 16/31頁
文件大小: 0K
描述: MPU RISC PID7V-603E 255FCCBGA
標(biāo)準(zhǔn)包裝: 60
系列: MPC6xx
處理器類型: 32-位 MPC603e PowerPC
速度: 300MHz
電壓: 2.5V
安裝類型: 表面貼裝
封裝/外殼: 255-BCBGA 裸露焊盤,255-FCCBGA
供應(yīng)商設(shè)備封裝: 255-FCCBGA(21x21)
包裝: 托盤
PID7t-603e Hardware Specifications, Rev. 5
Freescale Semiconductor
23
System Design Information
8.5
Pull-up Resistor Requirements
The 603e requires high-resistive (weak: 10 K
) pull-up resistors on several control signals of the bus
interface to maintain the control signals in the negated state after they have been actively negated and
released by the 603e or other bus master. These signals are: TS, ABB, DBB, and ARTRY.
In addition, the 603e has three open-drain style outputs that require pull-up resistors (weak or stronger:
4.7 K
–10 K) if they are used by the system. These signals are: APE, DPE, and CKSTP_OUT.
During inactive periods on the bus, the address and transfer attributes on the bus are not driven by any
master and may float in the high-impedance state for relatively long periods of time. Since the 603e must
continually monitor these signals for snooping, this float condition may cause excessive power draw by
the input receivers on the 603e. It is recommended that these signals be pulled up through weak (10 K
)
pull-up resistors or restored in some manner by the system. The snooped address and transfer attribute
inputs are—A[0–31], AP[0–3], TT[0–4], TBST, and GBL.
The data bus input receivers are normally turned off when no read operation is in progress and do not
require pull-up resistors on the data bus.
8.6
Thermal Management Information
This section provides thermal management information for the CBGA and PBGA packages for air-cooled
applications. Proper thermal control design is primarily dependent upon the system-level design—the heat
sink, airflow and thermal interface material.
This figure shows the upper and lower limits of the die junction-to-ambient thermal resistance for both
package styles. The lower limit is shown for the case of a densely populated PCB with high thermal
loading of adjacent and neighboring components.
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