參數(shù)資料
型號(hào): MFRC52201HN1
廠(chǎng)商: NXP Semiconductors N.V.
元件分類(lèi): 通信及網(wǎng)絡(luò)
英文描述: Contactless reader IC
封裝: MFRC52201HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52201HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁(yè)數(shù): 60/92頁(yè)
文件大?。?/td> 691K
代理商: MFRC52201HN1
MFRC522_35
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.5 — 21 June 2010
112135
60 of 92
NXP Semiconductors
MFRC522
Contactless reader IC
Table 113. TCounterValReg (higher bits) register (address 2Eh); reset value: xxh bit
allocation
Bit
7
6
5
Symbol
TCounterVal_Hi[7:0]
Access
Table 114. TCounterValReg register higher bit descriptions
Bit
Symbol
Description
7 to 0
TCounterVal_Hi
[7:0]
Table 115. TCounterValReg (lower bits) register (address 2Fh); reset value: xxh bit
allocation
Bit
7
6
5
Symbol
TCounterVal_Lo[7:0]
Access
Table 116. TCounterValReg register lower bit descriptions
Bit
Symbol
Description
7 to 0
TCounterVal_Lo
[7:0]
9.3.4
Page 3: Test
9.3.4.1
Reserved register 30h
Functionality is reserved for future use.
Table 117. Reserved register (address 30h); reset value: 00h bit allocation
Bit
7
6
5
Symbol
Access
Table 118. Reserved register bit descriptions
Bit
Symbol
7 to 0
reserved
9.3.4.2
TestSel1Reg register
General test signal configuration.
Table 119. TestSel1Reg register (address 31h); reset value: 00h bit allocation
Bit
7
6
5
Symbol
reserved
Access
-
4
3
2
1
0
R
timer value higher 8 bits
4
3
2
1
0
R
timer value lower 8 bits
4
3
2
1
0
reserved
-
Description
reserved for future use
4
3
2
1
0
TstBusBitSel[2:0]
R/W
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