參數(shù)資料
型號: MFRC52201HN1
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Contactless reader IC
封裝: MFRC52201HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52201HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁數(shù): 37/92頁
文件大小: 691K
代理商: MFRC52201HN1
MFRC522_35
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.5 — 21 June 2010
112135
37 of 92
NXP Semiconductors
MFRC522
Contactless reader IC
Table 26.
Bit Symbol
7
IRqInv
9.3.1.4
DivIEnReg register
Control bits to enable and disable the passing of interrupt requests.
Table 27.
Bit
Symbol
Access
Table 28.
Bit
7
9.3.1.5
ComIrqReg register
Interrupt request bits.
Table 29.
Bit
Symbol
Access
ComIEnReg register bit descriptions
Value
Description
1
signal on pin IRQ is inverted with respect to the Status1Reg register’s
IRq bit
0
signal on pin IRQ is equal to the IRq bit; in combination with the
DivIEnReg register’s IRqPushPull bit, the default value of logic 1 ensures
that the output level on pin IRQ is 3-state
-
allows the transmitter interrupt request (TxIRq bit) to be propagated to
pin IRQ
-
allows the receiver interrupt request (RxIRq bit) to be propagated to pin
IRQ
-
allows the idle interrupt request (IdleIRq bit) to be propagated to pin IRQ
HiAlertIEn
-
allows the high alert interrupt request (HiAlertIRq bit) to be propagated to
pin IRQ
LoAlertIEn -
allows the low alert interrupt request (LoAlertIRq bit) to be propagated to
pin IRQ
ErrIEn
-
allows the error interrupt request (ErrIRq bit) to be propagated to pin IRQ
TimerIEn
-
allows the timer interrupt request (TimerIRq bit) to be propagated to pin
IRQ
6
TxIEn
5
RxIEn
4
3
IdleIEn
2
1
0
DivIEnReg register (address 03h); reset value: 00h bit allocation
7
6
5
IRQPushPull
reserved
MfinActIEn
R/W
-
4
3
2
1
reserved
-
0
reserved
-
CRCIEn
R/W
R/W
DivIEnReg register bit descriptions
Symbol
Value Description
IRQPushPull
1
0
6 to 5 reserved
-
4
MfinActIEn
-
pin IRQ is a standard CMOS output pin
pin IRQ is an open-drain output pin
reserved for future use
allows the MFIN active interrupt request to be propagated to
pin IRQ
reserved for future use
allows the CRC interrupt request, indicated by the DivIrqReg
register’s CRCIRq bit, to be propagated to pin IRQ
reserved for future use
3
2
reserved
CRCIEn
-
-
1 to 0 reserved
-
ComIrqReg register (address 04h); reset value: 14h bit allocation
7
6
5
4
Set1
TxIRq
RxIRq
IdleIRq
W
D
D
D
3
2
1
0
HiAlertIRq
D
LoAlertIRq
D
ErrIRq
D
TimerIRq
D
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