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| 型號： | MFRC52201HN1 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Contactless reader IC |
| 封裝： | MFRC52201HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52201HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html& |
| 文件頁數(shù)： | 58/92頁 |
| 文件大?。?/td> | 691K |
| 代理商： | MFRC52201HN1 |
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MFRC522_35
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.5 — 21 June 2010
112135
58 of 92
NXP Semiconductors
MFRC522
Contactless reader IC
Table 106. TModeReg register bit descriptions
Bit
Symbol
7
TAuto
Table 107. TPrescalerReg register (address 2Bh); reset value: 00h bit allocation
Bit
7
6
5
Symbol
Access
Value
1
Description
timer starts automatically at the end of the transmission in
all communication modes at all speeds
if the RxModeReg register’s RxMultiple bit is not set, the
timer stops immediately after receiving the 5th bit (1 start
bit, 4 data bits)
if the RxMultiple bit is set to logic 1 the timer never stops, in
which case the timer can be stopped by setting the
ControlReg register’s TStopNow bit to logic 1
indicates that the timer is not influenced by the protocol
internal timer is running in gated mode
Remark:
in gated mode, the Status1Reg register’s
TRunning bit is logic 1 when the timer is enabled by the
TModeReg register’s TGated[1:0] bits
this bit does not influence the gating signal
non-gated mode
gated by pin MFIN
gated by pin AUX1
-
timer automatically restarts its count-down from the 16-bit
timer reload value instead of counting down to zero
timer decrements to 0 and the ComIrqReg register’s
TimerIRq bit is set to logic 1
defines the higher 4 bits of the TPrescaler value
The following formula is used to calculate the timer
frequency if the DemodReg register’s TPrescalEven bit in
Demot Regis set to logic 0:
f
timer
= 13.56 MHz / (2*TPreScaler+1).
Where TPreScaler = [TPrescaler_Hi:TPrescaler_Lo]
(TPrescaler value on 12 bits) (Default TPrescalEven
bit is logic 0)
The following formula is used to calculate the timer
frequency if the DemodReg register’s TPrescalEven bit is
set to logic 1:
f
timer
= 13.56 MHz / (2*TPreScaler+2).
See
Section 8.5 “Timer unit”
.
0
6 to 5
TGated[1:0]
00
01
10
11
1
4
TAutoRestart
0
3 to 0
TPrescaler_Hi[3:0]
-
4
3
2
1
0
TPrescaler_Lo[7:0]
R/W
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| MFRC52201HN1,115 | 功能描述:RFID應(yīng)答器 RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| MFRC52201HN1,118 | 功能描述:RFID應(yīng)答器 RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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| MFRC52201HN1,157 | 功能描述:RFID應(yīng)答器 CL READER IC’S RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| MFRC52201HN1/TRAYB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Contactless reader IC |
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