參數(shù)資料
型號: MD2533-D16G-X-P/Y
廠商: SANDISK CORP
元件分類: 存儲控制器/管理單元
英文描述: FLASH MEMORY DRIVE CONTROLLER, PBGA115
封裝: 12 X 18 MM, 1.40 MM HEIGHT, FBGA-115
文件頁數(shù): 6/87頁
文件大小: 1675K
代理商: MD2533-D16G-X-P/Y
Rev. 1.2
Product Overview
mDOC H3 EFD Featuring Embedded TrueFFS Data Sheet
14
92-DS-1205-10
of these features enables mDOC H3 to implement better security schemes to protect the code and
data it stores.
mDOC H3 can be configured to work with either demux (standard) interface or multiplexed
(MUX) interface. Using a multiplexed interface where data and address lines are multiplexed on
the same lines, reduces the number of signals required to connect mDOC H3 to the CPU.
The combination of unique H3 design, latest NAND technology and Embedded TrueFFS results
in a low-cost, minimal-sized flash disk that achieves unsurpassed reliability levels, enhanced
performance and ease of integration.
This breakthrough in performance, size, cost and design makes mDOC H3 the ideal solution for
mobile handsets and consumer electronics manufacturers who require easy integration, fast time
to market, high-capacity, small size, high-performance and, above all, high-reliability storage to
enable multimedia driven applications such as music, photo, video, TV, GPS, games, email,
office and other applications.
mDOC H3 offers advanced power consumption management throughout the selection of
different operating modes. The operating modes of the mDOC H3 device are designed to be
easily controlled by the chipset and DOC Driver to ensure optimal battery life in mobile devices.
mDOC H3 can be placed in any of the following four operating modes:
Turbo mode - While in Turbo mode, device internal clocks are optimized for maximal
performance.
Power Save mode – While in Power Save mode, device internal clocks are optimized to
balance between device performance and power consumption.
Standby mode – While in Standby mode, the clock of most internal cores is either
disconnected or reduced to a minimum. There is no wake-up time penalty.
Deep Power Down (DPD) mode - While in Deep Power-Down mode, device quiescent
power dissipation is reduced by disabling internal high current consumers (e.g. flash,
voltage regulators, input buffers, oscillator etc.)
The power management flexibility of mDOC H3 allows for the system designers to substantially
reduce the power consumption of the mDOC device, based on the requirements of the mobile
device, to effectively and considerably prolong battery life.
2.2
Demux (Standard) Interface
2.2.1
9x12/10x14/12x18 FBGA Ball Diagrams
Figure 2 shows the mDOC H3 115 ball demux interface ball diagram.
To ensure proper device functionality, balls marked RSRVD are reserved for future use and
should be connected as described in Table 1, Section 2.2.2.
Note: mDOC H3 is designed as a ball to ball compatible with mDOC G3, G4 and H1 products,
assuming that the latter were integrated according to the guidelines in the migration
guide. Refer to Migration Guide mDOC G3-P3 G3P3-LP G4 H1 to mDOC H3, for
further information.
相關(guān)PDF資料
PDF描述
MD2534-D1G-X-P FLASH MEMORY DRIVE CONTROLLER, PBGA115
MD2533-D8G-X-P FLASH MEMORY DRIVE CONTROLLER, PBGA115
SDED5-008G-NCY FLASH MEMORY DRIVE CONTROLLER, PBGA115
MD80C154-12/883 8-BIT, 12 MHz, MICROCONTROLLER, CDIP40
MD80C154-16P883D 8-BIT, 16 MHz, MICROCONTROLLER, CDIP40
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