參數(shù)資料
型號(hào): MD2533-D16G-X-P/Y
廠商: SANDISK CORP
元件分類: 存儲(chǔ)控制器/管理單元
英文描述: FLASH MEMORY DRIVE CONTROLLER, PBGA115
封裝: 12 X 18 MM, 1.40 MM HEIGHT, FBGA-115
文件頁(yè)數(shù): 31/87頁(yè)
文件大小: 1675K
代理商: MD2533-D16G-X-P/Y
Rev. 1.2
Embedded TrueFFS Technology
mDOC H3 EFD Featuring Embedded TrueFFS Data Sheet
37
92-DS-1205-10
6.3.7
Compatibility
Migrating from mDOC G3/G4/H1 and mDOC G3/G4 -based MCP to mDOC H3 and mDOC H3
-based MCP can be done by TrueFFS 7.1.
TrueFFS 7.1 supports all mDOC product line including mDOC G3/G4/H1 and mDOC H3.
DOC Driver 1.0 and higher provides stand alone SW support for mDOC H3 only. It does not
support mDOC G3/G4 and H1.
When using different software modules (e.g. Block Device DOC Driver, Boot application,
formatting utilities, etc.) to access mDOC H3 it is crucial to verify that all software modules are
based on the same code base version. It is also important to use only tools (e.g. DFORMAT,
DINFO, DIMAGE, etc.) from the same version as the DOC Drivers used by the application.
Failure to do so may lead to unexpected results, such as lost or corrupted data. The driver version
can be verified by the sign-on messages displayed, or by the version information presented by
the driver or tool.
6.4
128KB Memory Window
mDOC H3 utilizes a 128KB memory window in the CPU address space, consisting of four 32KB
sections as depicted in Figure 8. The addresses described here are relative to the absolute starting
address of the 128KB memory window.
The 32KB Programmable Boot Block (XIP) is aliased to section 0, 2 and 3. The sections are
aligned to addresses 00000H, 10000H and 18000H additionally the second half of section 1
contains the second half of the IPL. This is done in order to enable additional flexibility in the
IPL addressing schemes. For compatibility with next generation mDOC H3 devices, it is
recommended to use only 8KB of the 32KB Programmable Boot Block.
Address 8000H + offset is the base address for the mDOC H3 registers used for communication
with the mDOC H3 device (excluding the Paged RAM Registers).
相關(guān)PDF資料
PDF描述
MD2534-D1G-X-P FLASH MEMORY DRIVE CONTROLLER, PBGA115
MD2533-D8G-X-P FLASH MEMORY DRIVE CONTROLLER, PBGA115
SDED5-008G-NCY FLASH MEMORY DRIVE CONTROLLER, PBGA115
MD80C154-12/883 8-BIT, 12 MHz, MICROCONTROLLER, CDIP40
MD80C154-16P883D 8-BIT, 16 MHz, MICROCONTROLLER, CDIP40
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