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參數(shù)資料
| 型號(hào)： | MCRF360 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | CONNECTOR |
| 中文描述： | 連接器 |
| 文件頁(yè)數(shù)： | 10/23頁(yè) |
| 文件大?。?/td> | 568K |
| 代理商： | MCRF360 |
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MCRF355/360
DS21287F-page 10
2002 Microchip Technology Inc.
4.0
DEVICE PROGRAMMING
MCRF355/360 is a reprogrammable device in Contact
mode. The device has 154 bits of reprogrammable
memory. It can be programmed in the following proce-
dure. (A programmer, part number PG103003, is also
available from Microchip).
4.1
Programming Logic
Programming logic is enabled by applying power to the
device and clocking the device via the CLK pad while
loading the mode code via the V
PRG
pad (See
Examples 4-1 through 4-4 for test definitions). Both the
CLK and the V
PRG
pads have internal pull-down
resistors.
4.2
Pin Configuration
Connect antenna A, B and V
SS
pads to ground.
4.3
Pin Timing
1.
Apply V
DDT
voltage to V
DD
. Leave V
SS
, CLK and
V
PRG
at ground.
2.
Load mode code into the V
PRG
pad. The V
PRG
is sampled at CLK low to high edge.
3.
The above mode function (3.2.2) will be
executed when the last bit of code is entered.
4.
Power the device off (V
DD
= V
SS
) to exit
Programming mode.
5.
An alternative method to exit the Programming
mode is to bring CLK logic “High” before V
PRG
to
V
HH
(high voltage).
6.
Any Programming mode can be entered after
exiting the current function.
4.4
Programming Mode
4.5
Signal Timing
Examples 4-1 through 4-4 show the timing sequence
for programming and reading of the device.
EXAMPLE 4-1:
PROGRAMMING MODE 1: ERASE EE
EXAMPLE 4-2:
PROGRAMMING MODE 2: PROGRAM EE
1.
Erase EE Code:
0111010100
2.
Program EE Code:
0111010010
3.
Read EE Code:
0111010110
Note:
‘0’ means logic “Low” (V
IL
) and ‘1’
means logic “High” (V
IH
).
V
HH
V
IL
V
IH
T
WC
V
PRG
:
CLK Number:
CLK
1
2
3
4
5
6
7
8
9
10
11
Note:
Erases entire array to a ‘1’ state between CLK 11 and 12.
12
V
HH
…
V
IL
V
IH
T
WC
T
WC
Leave low to leave bit at “1”
Pulse high to program bit to “0”
Program bit #0 … Program bit #153
CLK Number:
CLK:
V
PRG
:
1
2
5
6
7
8
9
10
11
…
165
…
Note:
Pulsing V
PRG
to V
HH
for the bit programming time while holding the CLK low programs the bit to a ‘0’.
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