Revision 8.0 - 28 November 2001 : MCM20027
MOTOROLA
49
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
ImageMOS
The
Sync and Strobe Control register; Table 31
is used
to control the sync and strobe signals.
The
sr
bit when enabled causes the SYNC signal to go
high for exactly one clock cycle, and then returns to a
low. It remains low until the
sr
bit is enabled again.
The
sa
bit when enabled causes the SYNC signal high
until this bit is disabled. This causes continuous frame
processing.
The
se
bit when enabled will allow for an external signal
to drive the SYNC signal via the SYNC pin on the chip.
The
sae
bit when enabled will enable the STROBE sig-
nal to be generated automatically by the sensor.This will
only work in SFRS (Single Frame Rolling Shutter). The
STROBE signal is goes high when all the Rows in the
Frame are integrating together.
The
saw
bit allows the user to select how long the
STROBE signal is going to be on. If the bit is set to 1
(Setting 1), causes the STROBE Signal to be on from
the time all the Rows are integrating to 1 Row time
(T
ROW
) before Read-Out of the first Row commences. If
the bit is set to 0 (Setting 0), causes the STROBE signal
to on for a duration of 1 Row time (T
ROW
) from the time
all Rows are integrating
The
sso
bit ,when enabled, forces the STROBE signal
and thereby the STROBE Pin high until it is reset back
to 0. When this bit is set high - the
sae
and
saw
bit set-
tings become negligible.
NOTE! Please refer to
Figure 15, on page 14
for Strobe
Signal timing diagram.
Address
41
h
Sub-sample Control
Default
10
h
msb (7)
6
5
4
3
2
1
lsb (0)
x
FUO
FUO
cm
rf[1]
rf[0]
cf[1]
cf[0]
Bit
Number
Function
Description
Reset
State
7
Unused
Unused
x
6-5
FUO
Factory Use Only
FUO
4
Color
Mode
1
b
= Bayer Pattern Sampling
0
b
= Monochrome Pattern Sampling
1
b
3 - 2
Row Fre-
quency
11
b
= read one row pattern, skip 7 (1/8 sampled)
10
b
= read one row pattern, skip 3 (1/4 sampled)
01
b
= read one row pattern, skip one (1/2 sampled)
00
b
= full sampling
00
b
1 - 0
Column
Frequency
11
b
= read one column pattern, skip 7 (1/8 sampled)
10
b
= read one column pattern, skip 3 (1/4 sampled)
01
b
= read one column pattern, skip one (1/2 sampled)
00
b
= full sampling
00
b
Table 30. Sub-sample Control Register