MOTOROLA
Revision 8.0 - 28 November 2001 : MCM20027
20
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
ImageMOS
8.0 Sensor External Controls (Additional
Operational Conditions)
The MCM20027 includes initialization, standby modes,
and external reference voltage outputs to afford the
user additional applications flexibility.
8.1 Initialization
The INIT input pin (#42) controls reinitialization of the
MCM20027. This serves to assure controlled chip and
system startup. Control is asserted via a logic high in-
put. (i.e.. Asserting a Logic high “1” initializes all the
Registers, while asserting a Logic low “0” returns the
sensor to normal operation). This state must be held a
minimum of 1 ms and a 1 ms “wait period” should be al-
lowed before chip processing to ensure that the start-up
routines within the MCM20027 have run to completion,
and to guarantee that all holding and bypass capacitors,
etc. have achieved their required steady state values.
Tasks which are accomplished during startup include:
reset of the utility programming registers and initializa-
tion to their default values (please refer to previous sec-
tion for settings), reset of all internal counters and
latches, and setup of the analog signal processing
chain.
Another method of saving power consumption is to ap-
plying an active high signal to the INIT pin (#42) but
Note - Doing this will also cause initialization of the chip
.
8.2 Standby Mode
The standby mode option is implemented to allow the
user to reduce system power consumption during peri-
ods which do not require operation of the MCM20027.
This feature allows the user to extend battery life in low
power applications.
By utilizing this mode, the user may reduce dynamic
power consumption from 250mW RMS nominal
@13.5MHz to <100 uW in the standby mode.
The standby mode is activated by writing a “1” to bit 0 of
“Power Configuration Register” on page 41
. Writing a
“0” restores normal operation.
8.3 Tristate Mode
The sensors HCLK, SOF, VCLK, SYNC and STROBE
output signals as well as the pixel output data can be
tristated via the
Tristate Control Register, (Table 21), on
page 42
.
8.4 References CVREFP, CVREFM
The MCM20027 contains all internally generated refer-
ences and biases on-chip for system simplification. An
internally generated differential bandgap regulator de-
rives all the ADC and other analog signal processing re-
quired references. The user should connect 0.1
μ
F
capacitors to the CVREFP and CVREFM pins (#15 and
#14 respectively) to accurately hold the biases.
8.5 Common Mode References: VAG, VAGREF and
VAGRETURN
The MCM20027 holds the Common Mode Reference
Voltages on the chip to a stable value. In order to
achieve this stable value, the VAG (pin #16),
VAGREF(pin #18 ) and VAGRETURN (pin #17) have to
be connected to two 0.1
μ
F capacitors in the manner de-
scribed in the diagram below:
0.1
μ
F
0.1
μ
F
VAG
(pin #16)
VAGRETURN
(pin #17)
VAGREF
(pin #18)