參數(shù)資料
型號: MCF5471ZP200
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 200 MHz, RISC PROCESSOR, PBGA388
封裝: 27 X 27 MM, 1 MM PITCH, PLASTIC, MS-034AAL-1, BGA-388
文件頁數(shù): 31/96頁
文件大?。?/td> 2003K
代理商: MCF5471ZP200
MOTOROLA
MCF547x Integrated Microprocessor Hardware Specifications
37
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Signal Description
1.5.1.7.5
Transmit Data 0 (E0TXD0, E1TXD0)
ETXD0 is the serial output Ethernet data and is only valid during the assertion of ETXEN. This signal is
used for 10 Mbps Ethernet data. This signal is also used for MII mode data in conjunction with ETXD[3:1].
1.5.1.7.6
Collision (E0COL, E1COL)
The ECOL input is asserted upon detection of a collision and remains asserted while the collision persists.
This signal is not defined for full-duplex mode.
1.5.1.7.7
Receive Clock (E0RXCLK, E1RXCLK)
The receive clock (ERXCLK) input provides a timing reference for ERXDV, ERXD[3:0], and ERXER.
1.5.1.7.8
Receive Data Valid (E0RXDV, E1RXDV)
Asserting the receive data valid (ERXDV) input indicates that the PHY has valid nibbles present on the MII.
ERXDV should remain asserted from the first recovered nibble of the frame through to the last nibble.
Assertion of ERXDV must start no later than the SFD and exclude any EOF.
1.5.1.7.9
Receive Data 0 (E0RXD0, E1RXD0)
ERXD0 is the Ethernet input data transferred from the PHY to the media-access controller when ERXDV
is asserted. This signal is used for 10 Mbps Ethernet data. This signal is also used for MII mode Ethernet
data in conjunction with ERXD[3:1].
1.5.1.7.10 Carrier Receive Sense (E0CRS, E1CRS)
ECRS is an input signal which when asserted signals that transmit or receive medium is not idle, and applies
to MII mode operation.
1.5.1.7.11 Transmit Data 1–3 (E0TXD[3:1], E1TXD[3:1])
These pins contain the serial output Ethernet data and are valid only during assertion of ETXEN in MII
mode.
1.5.1.7.12 Transmit Error (E0TXER, E1TXER)
When the ETXER output is asserted for one or more clock cycles while ETXEN is also asserted, the PHY
sends one or more illegal symbols. ETXER has no effect at 10 Mbps or when ETXEN is negated, and applies
to MII mode operation.
1.5.1.7.13 Receive Data 1–3 (E0RXD[3:1], E1RXD[3:1])
These pins contain the Ethernet input data transferred from the PHY to the media-access controller when
ERXDV is asserted in MII mode operation.
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