參數(shù)資料
型號(hào)： MCF5232
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Integrated Microprocessor Hardware Specification
中文描述： 集成的微處理器，硬件規(guī)格
文件頁(yè)數(shù)： 36/60頁(yè)
文件大?。?/td> 1462K
代理商： MCF5232
MCF523x Integrated Microprocessor Hardware Specification, Rev. 1.3
Preliminary
Preliminary Electrical Characteristics
Freescale Semiconductor
36
NOTES:
1
θ
JMA
and
Ψ
jt
parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
θ
JmA
and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction
temperatures can be significantly influenced by board layout and surrounding devices. Conformance to the device
junction temperature specification can be verified by physical measurement in the customer’s system using the
Ψ
jt
parameter, the device power dissipation, and the method described in EIA/JESD Standard 51-2.
2
Per JEDEC JESD51-6 with the board horizontal.
3
θ
JMA
and
Ψ
jt
parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
θ
JmA
and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction
temperatures can be significantly influenced by board layout and surrounding devices. Conformance to the device
junction temperature specification can be verified by physical measurement in the customer’s system using the
Ψ
jt
parameter, the device power dissipation, and the method described in EIA/JESD Standard 51-2.
4
Per JEDEC JESD51-6 with the board horizontal.
5
θ
JMA
and
Ψ
jt
parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
θ
JmA
and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction
temperatures can be significantly influenced by board layout and surrounding devices. Conformance to the device
junction temperature specification can be verified by physical measurement in the customer’s system using the
Ψ
jt
parameter, the device power dissipation, and the method described in EIA/JESD Standard 51-2.
6
Per JEDEC JESD51-6 with the board horizontal.
7
Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
8
Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
9
Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
10
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
11
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
12
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
13
Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is
written in conformance with Psi-JT.
14
Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is
written in conformance with Psi-JT.
15
Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is
written in conformance with Psi-JT.
The average chip-junction temperature (T
J
) in
°
C can be obtained from:
(1)
Where:
T
A
= Ambient Temperature,
°
C
Θ
JMA
= Package Thermal Resistance, Junction-to-Ambient,
°
C/W
P
D
= P
INT
+
P
I/O
P
INT
= I
DD
×
V
DD
, Watts - Chip Internal Power
T
J
T
A
P
D
Θ
JMA
×
(
)
+
=
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