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參數(shù)資料
| 型號： | MC92602ZTA |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA196 |
| 封裝： | 15 X 15 MM, 1.60 MM HEIGHT, 1 MM PITCH, MAPBGA-196 |
| 文件頁數(shù)： | 9/102頁 |
| 文件大?。?/td> | 1581K |
| 代理商： | MC92602ZTA |
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MC92602 SerDes Reference Manual
MOTOROLA
General Information
Chapter 8, “Package Description,” provides the package parameters and mechanical
dimensions and signal pin to ball mapping tables for the MC92602 device.
Appendix A, “Ordering Information,” provides the Motorola part numbering
nomenclature for the MC92602 transceiver.
Appendix B, “8B/10B Coding Scheme,” provides tables of the fibre
channel-specific 8B/10B encoding and decoding as based on the ANSI FC-1 fibre
channel standard.
Appendix C, “Revision History,” lists the major differences between revisions of
this book, the MC92602 Quad 1.25 Gbaud Reduced Interface SerDes Reference
Manual, Rev. 0 and Rev. 1.
“Glossary of Terms and Abbreviations,” contains an alphabetical list of terms,
phrases, and abbreviations used in this book.
“Index,” contains all general entries for the book.
Suggested Reading
This section lists additional reading that provides background for the information in this
manual as well as general information about the architecture.
General Information
The following documentation, published by Morgan-Kaufmann Publishers, 340 Pine
Street, Sixth Floor, San Francisco, CA, provides useful information about the PowerPC
architecture and computer architecture in general:
The PowerPC Architecture: A Specification for a New Family of RISC Processors,
Second Edition, by International Business Machines, Inc.
Computer Architecture: A Quantitative Approach, Second Edition, by
John L. Hennessy and David A. Patterson.
Computer Organization and Design: The Hardware/Software Interface, Second
Edition, David A. Patterson and John L. Hennessy.
Related Documentation
Motorola documentation is available from the sources listed on the back cover of this
manual; the document order numbers are included in parentheses for ease in ordering:
Reference manuals—These books provide details about individual device
implementations. The MC92602DVB Reduced Interface SerDes Design Verification
Board User’s Guide (MC92602DVBUG) describes how to use the design
verification board and should be read in conjunction with this book, the MC92602
Quad 1.25 Gbaud Reduced Interface SerDes Reference Manual (MC92602RM).
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Freescale Semiconductor, Inc.
For More Information On This Product,
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC92603VF | 功能描述:IC TXRX ETH QUAD GIG 256-MAPBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:25 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-PDIP 包裝:管件 |
| MC92603VM | 功能描述:IC ETH TXRX QUAD GIG 256-MAPBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| MC92604VM | 功能描述:IC ETH TXRX DUAL GIG 196-MAPBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| MC92604ZT | 功能描述:IC TXRX ETH DUAL GIG 196-MAPBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:25 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-PDIP 包裝:管件 |
| MC92610 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Quad 3.125 Gbaud SERDES |
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