參數(shù)資料
型號: MC92602ZTA
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA196
封裝: 15 X 15 MM, 1.60 MM HEIGHT, 1 MM PITCH, MAPBGA-196
文件頁數(shù): 47/102頁
文件大?。?/td> 1581K
代理商: MC92602ZTA
MOTOROLA
Chapter 5. System Design Considerations
5-1
Chapter 5
System Design Considerations
This chapter describes general system considerations for the MC92602 Quad DDR,
including device-startup, initialization and the proper use of the configuration and control
signals, the reference clock configuration, and general recommendations. This chapter
consists of the following sections:
5.1
Reference Clock Configuration
The clock inputs REF_CLK_P and REF_CLK_N are the differential reference clock inputs
for the MC92602. The frequency of the clock signal applied to these inputs along with the
settings on the configuration inputs determine the speed at which the serial links operate.
Also, the legal ranges of reference clock frequencies vary depending on the configuration
selected. Table 5-1 shows the ranges allowed for each configuration.
NOTE
The device must be reset by setting RESET low, if the
reference clock configuration, HSE, is changed after power up.
Table 5-1. Legal Reference Clock Frequency Ranges
HSE
Reference Frequency
Min (MHz)
Reference Frequency
Max (MHz)
Link Transfer Rate
(Gigabaud)
Low
95.00
135.0
0.95–1.35
High
47.50
67.50
0.475–0.675
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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