參數(shù)資料
型號(hào): MC8DE08GQAPR-MWA
元件分類: 存儲(chǔ)控制器/管理單元
英文描述: FLASH MEMORY DRIVE CONTROLLER, PBGA
封裝: FBGA
文件頁數(shù): 33/65頁
文件大?。?/td> 799K
代理商: MC8DE08GQAPR-MWA
NAND Flash-based Solid State Disk
39
Sep. 27. 2006
5.4.4 Effect
The content of this register becomes a command parameter when the Comand register is written.
5.4.5 Functional description
The content of this register is command dependent
5.4.3 Access Restrictions
This register shall be written only when both BSY and DRQ are cleared to zero and DMACK- is noet asserted.
The contents of this register are valid only when BSY is cleared to zero. If this register is written when BSY or DRQ is set to one, the
result is indeterminate. The contents of this register are not valid while a device is in the Sleep mode.
5.4.2 Direction
This register is read/write.
5.4 Cylinder High Register
5.4.1 Address
CS1
CS0
DA2
DA1
DA0
NA
A
N
A
A=asserted, N=negated
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