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參數(shù)資料
| 型號： | MC80C52XXX-16/883 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40 |
| 文件頁數(shù)： | 122/204頁 |
| 文件大?。?/td> | 5687K |
| 代理商： | MC80C52XXX-16/883 |
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24
ATtiny40 [DATASHEET]
8263B–AVR–01/2013
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for
four cycles in addition to the start-up time, executes the interrupt routine, and resumes execution from the instruc-
tion following SLEEP. The contents of the Register File and SRAM are unaltered when the device wakes up from
sleep. If a reset occurs during sleep mode, the MCU wakes up and executes from the Reset Vector.
Note that if a level triggered interrupt is used for wake-up the changed level must be held for some time to wake up
the MCU (and for the MCU to enter the interrupt service routine). See “External Interrupts” on page 37 for details.
7.1.1
Idle Mode
When bits SM[2:0] are written to 000, the SLEEP instruction makes the MCU enter Idle mode, stopping the CPU
but allowing the analog comparator, ADC, timer/counters, watchdog, TWI, SPI and the interrupt system to continue
operating. This sleep mode basically halts clk
CPU and clkNVM, while allowing the other clocks to run.
Idle mode enables the MCU to wake up from external triggered interrupts as well as internal ones like the timer
overflow. If wake-up from the analog comparator interrupt is not required, the analog comparator can be powered
down by setting the ACD bit in “ACSRA – Analog Comparator Control and Status Register” on page 95. This will
reduce power consumption in idle mode. If the ADC is enabled, a conversion starts automatically when this mode
is entered.
7.1.2
ADC Noise Reduction Mode
When bits SM[2:0] are written to 001, the SLEEP instruction makes the MCU enter ADC Noise Reduction mode,
stopping the CPU but allowing the ADC, the external interrupts, TWI and the watchdog to continue operating (if
enabled). This sleep mode halts clk
I/O, clkCPU, and clkNVM, while allowing the other clocks to run.
This mode improves the noise environment for the ADC, enabling higher resolution measurements. If the ADC is
enabled, a conversion starts automatically when this mode is entered.
7.1.3
Power-down Mode
When bits SM[2:0] are written to 010, the SLEEP instruction makes the MCU enter Power-down mode. In this
mode, the oscillator is stopped, while the external interrupts, TWI and the watchdog continue operating (if
enabled). Only a watchdog reset, an external level interrupt on INT0, a pin change interrupt, or a TWI slave inter-
rupt can wake up the MCU. This sleep mode halts all generated clocks, allowing operation of asynchronous
modules only.
7.1.4
Standby Mode
When bits SM[2:0] are written to 100, the SLEEP instruction makes the MCU enter Standby mode. This mode is
identical to Power-down with the exception that the oscillator is kept running. This reduces wake-up time, because
the oscillator is already running and doesn't need to be started up.
7.2
Software BOD Disable
When the Brown-out Detector (BOD) is enabled by BODLEVEL fuses (see Table 19-5 on page 146), the BOD is
actively monitoring the supply voltage during a sleep period. In some devices it is possible to save power by dis-
abling the BOD by software in Power-down and Stand-by sleep modes. The sleep mode power consumption will
then be at the same level as when BOD is globally disabled by fuses.
If BOD is disabled by software, the BOD function is turned off immediately after entering the sleep mode. Upon
wake-up from sleep, BOD is automatically enabled again. This ensures safe operation in case the V
CC level has
dropped during the sleep period.
When the BOD has been disabled, the wake-up time from sleep mode will be approximately 60 s to ensure that
the BOD is working correctly before the MCU continues executing code.
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