參數(shù)資料
型號(hào)： MC68HC705P6ACDW
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 29/98頁(yè)
文件大?。?/td> 0K
描述： IC MCU 2.1MHZ 4.5K OTP 28-SOIC
標(biāo)準(zhǔn)包裝： 26
系列： HC05
核心處理器： HC05
芯體尺寸： 8-位
速度： 2.1MHz
連通性： SIO
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 21
程序存儲(chǔ)器容量： 4.5KB（4.5K x 8）
程序存儲(chǔ)器類(lèi)型： OTP
RAM 容量： 176 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-SOIC（0.295"，7.50mm 寬）
包裝： 管件
Interrupt Types
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
Freescale Semiconductor
35
5.2 Interrupt Types
The interrupts fall into three categories: reset, software, and hardware.
5.2.1 Reset Interrupt Sequence
The reset function is not in the strictest sense an interrupt; however, it is acted upon in a similar manner
as shown in Figure 5-1. A low-level input on the RESET pin or internally generated RST signal causes
the program to vector to its starting address which is specified by the contents of memory locations $1FFE
and $1FFF. The I bit in the condition code register is also set. The MCU is configured to a known state
during this type of reset as previously described in Chapter 4 Resets.
5.2.2 Software Interrupt (SWI)
The SWI is an executable instruction. It is also a non-maskable interrupt since it is executed regardless
of the state of the I bit in the CCR. As with any instruction, interrupts pending during the previous
instruction will be serviced before the SWI opcode is fetched. The interrupt service routine address for the
SWI instruction is specified by the contents of memory locations $1FFC and $1FFD.
5.2.3 Hardware Interrupts
All hardware interrupts are maskable by the I bit in the CCR. If the I bit is set, all hardware interrupts
(internal and external) are disabled. Clearing the I bit enables the hardware interrupts. Four hardware
interrupts are explained in the following subsections.
5.2.3.1 External Interrupt (IRQ)
The IRQ/VPP pin drives an asynchronous interrupt to the CPU. An edge detector flip-flop is latched on the
falling edge of IRQ/VPP. If either the output from the internal edge detector flip-flop or the level on the
IRQ/VPP pin is low, a request is synchronized to the CPU to generate the IRQ interrupt. If the LEVEL bit
in the mask option register is clear (edge-sensitive only), the output of the internal edge detector flip-flop
is sampled and the input level on the IRQ/VPP pin is ignored. The interrupt service routine address is
specified by the contents of memory locations $1FFA and $1FFB. If the port A interrupts are enabled by
the MOR, they generate external interrupts identically to the IRQ/VPP pin.
NOTE
The internal interrupt latch is cleared nine internal clock cycles after the
interrupt is recognized (immediately after location $1FFA is read).
Therefore, another external interrupt pulse could be latched during the IRQ
service routine.
Another interrupt will be serviced if the IRQ pin is still in a low state when
the RTI in the service routine is executed.
5.2.3.2 Input Capture Interrupt
The input capture interrupt is generated by the 16-bit timer as described in Chapter 8 Capture/Compare
Timer. The input capture interrupt flag is located in register TSR and its corresponding enable bit can be
found in register TCR. The I bit in the CCR must be clear for the input capture interrupt to be enabled. The
interrupt service routine address is specified by the contents of memory locations $1FF8 and $1FF9.
相關(guān)PDF資料
PDF描述
C8051F336-GM IC MCU 16K FLASH 20QFN
EHFWX2B CONN EEE1394 FMAL T/H CROSS BLK
MC68HC705KJ1CDW IC MCU 4MHZ 1.2K OTP 16-SOIC
MC68HC705J1ACP IC MCU 4MHZ 1.2K OTP 20-DIP
LPC11U12FBD48/201, IC MCU 32BIT 16K 48LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC705P6ACP 功能描述:IC MCU 2.1MHZ 4.5K OTP 28-DIP RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 其它有關(guān)文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標(biāo)準(zhǔn)包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設(shè)備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲(chǔ)器容量:64KB（64K x 8） 程序存儲(chǔ)器類(lèi)型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤(pán) 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND
MC68HC705P6ADW 制造商:Rochester Electronics LLC 功能描述:MCU, 176 BYTES RAM, A/D - Bulk
MC68HC705P6AMDW 功能描述:IC MCU 4.6K OTP 2.1MHZ 28-SOIC RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 標(biāo)準(zhǔn)包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設(shè)備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲(chǔ)器容量:40KB（20K x 16） 程序存儲(chǔ)器類(lèi)型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤(pán) 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323
MC68HC705P6AMP 制造商:Rochester Electronics LLC 功能描述:- Bulk
MC68HC705P6CDW 制造商:Motorola Inc 功能描述:
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*