參數(shù)資料
型號: MC68HC705J1ACP
廠商: Freescale Semiconductor
文件頁數(shù): 162/162頁
文件大?。?/td> 0K
描述: IC MCU 4MHZ 1.2K OTP 20-DIP
標準包裝: 18
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 4MHz
外圍設備: POR,WDT
輸入/輸出數(shù): 14
程序存儲器容量: 1.2KB(1.2K x 8)
程序存儲器類型: OTP
RAM 容量: 64 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-DIP(0.300",7.62mm)
包裝: 管件
Computer Operating Properly (COP) Module
Interrupts
MC68HC705J1A — Rev. 4.0
Technical Data
Computer Operating Properly (COP) Module
Clearing the COP bit disables the COP watchdog timer regardless of the
IRQ/VPP pin voltage.
If the main program executes within the COP timeout period, the clearing
routine should be executed only once. If the main program takes longer
than the COP timeout period, the clearing routine must be executed
more than once.
NOTE:
Place the clearing routine in the main program and not in an interrupt
routine. Clearing the COP watchdog in an interrupt routine might prevent
COP watchdog timeouts even though the main program is not operating
properly.
7.4 Interrupts
The COP watchdog does not generate interrupts.
7.5 COP Register
The COP register (COPR) is a write-only register that returns the
contents of EPROM location $07F0 when read.
COPC — COP Clear Bit
This write-only bit resets the COP watchdog. Reading address $07F0
returns undefined results.
Address:
$07F0
Bit 7
6
54321
Bit 0
Read:
Write:
COPC
Reset:
0
= Unimplemented
Figure 7-1. COP Register (COPR)
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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