參數(shù)資料
型號: MC68HC705J1ACP
廠商: Freescale Semiconductor
文件頁數(shù): 134/162頁
文件大?。?/td> 0K
描述: IC MCU 4MHZ 1.2K OTP 20-DIP
標(biāo)準(zhǔn)包裝: 18
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 14
程序存儲器容量: 1.2KB(1.2K x 8)
程序存儲器類型: OTP
RAM 容量: 64 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-DIP(0.300",7.62mm)
包裝: 管件
Resets and Interrupts
Interrupts
MC68HC705J1A — Rev. 4.0
Technical Data
Resets and Interrupts
4.4 Interrupts
These sources can generate interrupts:
Software interrupt (SWI) instruction
External interrupt pins:
IRQ/VPP
PA0–PA3
Timer:
Real-time interrupt flag (RTIF)
Timer overflow flag (TOF)
An interrupt temporarily stops the program sequence to process a
particular event. An interrupt does not stop the operation of the
instruction being executed, but takes effect when the current instruction
completes its execution. Interrupt processing automatically saves the
CPU registers on the stack and loads the program counter with a
user-defined interrupt vector address.
4.4.1 Software Interrupt
The software interrupt (SWI) instruction causes a non-maskable
interrupt.
4.4.2 External Interrupt
An interrupt signal on the IRQ/VPP pin latches an external interrupt
request. When the CPU completes its current instruction, it tests the IRQ
latch. If the IRQ latch is set, the CPU then tests the I bit in the condition
code register. If the I bit is clear, the CPU then begins the interrupt
sequence.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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