參數(shù)資料
型號: MC68HC705J1ACP
廠商: Freescale Semiconductor
文件頁數(shù): 15/162頁
文件大小: 0K
描述: IC MCU 4MHZ 1.2K OTP 20-DIP
標(biāo)準(zhǔn)包裝: 18
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 14
程序存儲器容量: 1.2KB(1.2K x 8)
程序存儲器類型: OTP
RAM 容量: 64 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-DIP(0.300",7.62mm)
包裝: 管件
Multifunction Timer Module
Operation
MC68HC705J1A — Rev. 4.0
Technical Data
Multifunction Timer Module
9.3 Operation
A 15-stage ripple counter, preceded by a prescaler that divides the
internal clock signal by four, provides the timing reference for the timer
functions. The value of the first eight timer stages can be read at any
time by accessing the timer counter register at address $0009. A timer
overflow function at the eighth stage allows a timer interrupt every 1024
internal clock cycles.
The next four stages lead to the real-time interrupt (RTI) circuit. The RT1
and RT0 bits in the timer status and control register at address $0008
allow a timer interrupt every 16,384, 32,768, 65,536, or 131,072 clock
cycles. The last four stages drive the selectable COP system. For
information on the COP, refer to the Section 7. Computer Operating
Addr.
Register Name
Bit 7
654321
Bit 0
$0008
Timer Status and Control
Register (TSCR)
Read:
TOF
RTIF
TOIE
RTIE
00
RT1
RT0
Write:
TOFR
RTIFR
Reset:
00
000011
$0009
Timer Counter Register
(TCR)
Read:
TMR7
TMR6
TMR5
TMR4
TMR3
TMR2
TMR1
TMR0
Write:
Reset:
00
000000
= Unimplemented
Figure 9-2. I/O Register Summary
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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