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Scan Chain Test Access Port
8-4
MC68360 USER’S MANUAL
The boundary scan bit definitions are listed in Table 8-2.
The first column in the table defines the bit’s ordinal position in the boundary scan register.
The shift register cell nearest TDO (i.e., first to be shifted out) is defined as bit 0; the last bit
to be shifted out is 195.
The second column references one of the four QUICC cell types depicted in Figure 8-3
through , which describe the cell structure for each type.
The third column lists the pin name for all pin-related cells or defines the name of bidirec-
tional control register bits.
The fourth column lists the pin type for convenience, where TS-Output indicates a three-
stateable output pin, I/O indicates a bidirectional pin, and OD-I/O denotes an open-drain
bidirectional pin.
The last column indicates the associated boundary scan register control bit for bidirectional,
three-state, and open-drain output pins.
Bidirectional pins include a single scan cell for data (IO.Cell) as depicted in Figure 8-6.
These bits are controlled by the cell shown in Figure 8-5. The value of the control bit deter-
mines whether the bidirectional pin is an input or an output. One or more bidirectional data
cells can be serially connected to a control cell as shown in Figure 8-7. Note that, when sam-
pling the bidirectional data cells, the cell data can be interpreted only after examining the IO
control cell to determine pin direction, and also note that the control cell captures the value
of the following cell.
Table 8-1. Boundary Scan Control Bits
Name
Bit Number
Name
Bit Number
Name
Bit Number
g1.cntl
2
g10.cntl
32
pbhl.ctl
155
g2.cntl
5
add.cntl
59
pblh.ctl
159
g3.cntl
8
addh.cntl
83
pchh.ctl
170
g4.cntl
13
g11.cnt
89
pchl.ctl
174
g5.cntl
16
db.ctl
110
pclh.ctl
179
g6.cntl
18
pahh.ctl
131
g12.cntl
188
g7.cntl
23
pahl.ctl
136
g13.cntl
191
g8.cntl
27
palh.ctl
141
g14.cntl
194
g9.cntl
29
pbhh.ctl
150
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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