參數(shù)資料
型號： MC68EC030
廠商： Motorola, Inc.
英文描述： Second-Generation 32-Bit Enhanced Embedded Controller
中文描述： 第二代32位增強型嵌入式控制器
文件頁數(shù)： 10/36頁
文件大?。?/td> 392K
代理商： MC68EC030
10
MC68EC030 TECHNICAL DATA
Go to: www.freescale.com
MOTOROLA
INSTRUCTION SET OVERVIEW
The MC68EC030 instruction set is listed in Table 2. Each instruction, with few exceptions, operates on
bytes, words, and long words, and most instructions can use any of the 18 addressing modes. The
MC68EC030 is upward source- and object-level code compatible with the M68000 Family because it
supports all instructions of previous family members.
Table 2. Instruction Set
Mnemonic
ABCD
ADD
ADDA
ADDI
ADDQ
ADDX
AND
ANDI
ASL,ASR
Bcc
BCHG
BCLR
BFCHG
BFCLR
BFEXTS
BEFXTU
BFFFO
BFINS
BFSET
BFTST
BKPT
BRA
BSET
BSR
BTST
CAS
CAS2
CHK
CHK2
Description
Mnemonic
MOVE
MOVEA
MOVE CCR
MOVE SR
MOVE USP
MOVEC
MOVEM
MOVEP
MOVEQ
MOVES
MULS
MULU
NBCD
NEG
NEGX
NOP
NOT
OR
ORI
PACK
PEA
PFLUSH
PLOAD
PMOVE
PTEST
RESET
ROL, ROR
ROXL, ROXR
RTD
RTE
RTR
RTS
SBCD
Scc
STOP
SUB
SUBA
SUBI
SUBQ
SUBX
SWAP
TAS
TRAP
TRAPcc
TRAPV
TST
UNLK
UNPK
Description
Add Decimal with Extend
Add
Add Address
Add Immediate
Add Quick
Add with Extend
Logical AND
Logical AND Immediate
Arithmetic Shift Left and Right
Branch Conditionally
Test Bit and Change
Test Bit and Clear
Test Bit Field and Change
Test Bit Field and Clear
Signed Bit Field Extract
Unsigned Bit Field Extract
Bit Field Find First One
Bit Field Insert
Test Bit Field and Set
Test Bit Field
Breakpoint
Branch
Test Bit and Set
Branch to Subroutine
Test Bit
Compare and Swap Operands
Compare and Swap Dual Operands
Check Register Against Bound
Check Register Against Upper and Lower
Bounds
Clear
Compare
Compare Address
Compare Immediate
Compare Memory to Memory
Compare Register Against Upper and
Lower Bounds
Test Condition, Decrement and Branch
Signed Divide
Unsigned Divide
Logical Exclusive OR
Logical Exclusive OR Immediate
Exchange Registers
Sign Extend
Take Illegal Instruction Trap
Jump
Jump to Subroutine
Load Effective Address
Link and Allocate
Logical Shift Left and Right
Move
Move Address
Move Condition Code Register
Move Status Register
Move User Stack Pointer
Move Control Register
Move Multiple Registers
Move Peripheral
Move Quick
Move Alternate Address Space
Signed Multiply
Unsigned Multiply
Negate Decimal with Extend
Negate
Negate with Extend
No Operation
Logical Complement
Logical Inclusive OR
Logical Inclusive OR Immediate
Pack BCD
Push Effective Address
No Effect
No Effect
Move to/from ACx Registers
Test Address in ACx Registers
Reset External Devices
Rotate Left and Right
Rotate with Extend Left and Right
Return and Deallocate
Return from Exception
Return and Restore Codes
Return from Subroutine
Subtract Decimal with Extend
Set Conditionally
Stop
Subtract
Subtract Address
Subtract Immediate
Subtract Quick
Subtract with Extend
Swap Register Words
Test Operand and Set
Trap
Trap Conditionally
Trap on Overflow
Test Operand
Unlink
Unpack BCD
CLR
CMP
CMPA
CMPI
CMPM
CMP2
DBcc
DIVS,DIVSL
DIVU, DIVUL
EOR
EORI
EXG
EXT, EXTB
ILLEGAL
JMP
JSR
LEA
LINK
LSL, LSR
F
Freescale Semiconductor, Inc.
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