PWMA0 73 M11 Output In reset, output is disabled, pull-up is " />
參數(shù)資料
型號: MC56F8347VVFE
廠商: Freescale Semiconductor
文件頁數(shù): 100/172頁
文件大?。?/td> 0K
描述: IC DGTL SIGNAL CTLR 160-MAPBGA
標準包裝: 126
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 60MHz
連通性: CAN,EBI/EMI,SCI,SPI
外圍設備: POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 76
程序存儲器容量: 136KB(68K x 16)
程序存儲器類型: 閃存
RAM 容量: 6K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 16x12b
振蕩器型: 外部
工作溫度: -40°C ~ 105°C
封裝/外殼: 160-BGA
包裝: 托盤
配用: MC56F8367EVME-ND - EVAL BOARD FOR MC56F83X
Signal Pins
56F8347 Technical Data, Rev.11
Freescale Semiconductor
33
Preliminary
PWMA0
73
M11
Output
In reset,
output is
disabled,
pull-up is
enabled
PWMA0 - 5 — These are six PWMA outputs.
PWMA1
75
P12
PWMA2
76
N11
PWMA3
78
M12
PWMA4
79
P13
PWMA5
81
N12
ISA0
(GPIOC8)
126
A11
Schmitt
Input
Schmitt
Input/
Output
Input,
pull-up
enabled
ISA0 - 2 — These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMA.
Port C GPIO — These GPIO pins can be individually
programmed as input or output pins.
In the 56F8347, these pins default to ISA functionality after
reset.
In the 56F8147, the default state is not one of the functions
offered and must be reconfigured.
To deactivate the internal pull-up resistor, clear the
appropriate bit of the GPIOC_PUR register. For details, see
ISA1
(GPIOC9)
127
C11
ISA2
(GPIOC10)
128
D11
FAULTA0
82
N13
Schmitt
Input
Input,
pull-up
enabled
FAULTA0 - 2 — These three fault input pins are used for
disabling selected PWMA outputs in cases where fault
conditions originate off-chip.
To deactivate the internal pull-up resistor, set the PWMA0 bit
in the SIM_PUDR register. For details, see Part 6.5.8.
FAULTA1
84
N14
FAULTA2
85
M13
FAULTA3
87
M14
Schmitt
Input
Input,
pull-up
enabled
FAULTA3 — This fault input pin is used for disabling
selected PWMA outputs in cases where fault conditions
originate off-chip.
To deactivate the internal pull-up resistor, set the PWMA1 bit
in the SIM_PUDR register. See Part 6.5.6 for details.
PWMB0
38
N1
Output
In reset,
output is
disabled,
pull-up is
enabled
PWMB0 - 5 — Six PWMB output pins.
PWMB1
39
P1
PWMB2
40
N2
PWMB3
43
N3
PWMB4
44
P2
PWMB5
45
M3
Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA (Continued)
Signal Name
Pin
No.
Ball
No.
Type
State
During
Reset
Signal Description
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