參數(shù)資料
型號: MC56F8347VPY60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP160
封裝: LQFP-160
文件頁數(shù): 68/160頁
文件大小: 2217K
代理商: MC56F8347VPY60
16
56F8347 Technical Data
Preliminary
A0
(GPIOA8)
154
Output
Input/
Output
Tri-stated
Address Bus — A0 - A5 specify six of the address lines
for external program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), A0 - A5 and EMI control signals are
tri-stated when the external bus is inactive.
Port A GPIO — These six GPIO pins can be individually
programmed as input or output pins.
After reset, these pins default to address bus functionality
and must be programmed as GPIO.
To deactivate the internal pull-up resistor, clear the
appropriate GPIO bit in the GPIOA_PUR register.
Example: GPIOA8, clear bit 8 in the GPIOA_PUR register.
A1
(GPIOA9)
10
A2
(GPIOA10)
11
A3
(GPIOA11)
12
A4
(GPIOA12)
13
A5
(GPIOA13)
14
A6
(GPIOE2)
17
Output
Schmitt
Input/
Output
Tri-stated
Input
Address Bus — A6 - A7 specify two of the address lines
for external program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), A6 - A7 and EMI control signals are
tri-stated when the external bus is inactive.
Port E GPIO — These two GPIO pins can be individually
programmed as input or output pins.
After reset, the default state is Address Bus.
To deactivate the internal pull-up resistor, clear the
appropriate GPIO bit in the GPIOE_PUR register.
Example: GPIOE2, clear bit 2 in the GPIOE_PUR register.
A7
(GPIOE3)
18
Table 2-2 56F8347 Signal and Package Information for the 160-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
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