參數(shù)資料
型號： MC56F8347VPY60
廠商： MOTOROLA INC
元件分類： 數(shù)字信號處理
英文描述： 16-BIT, 120 MHz, OTHER DSP, PQFP160
封裝： LQFP-160
文件頁數(shù)： 57/160頁
文件大小： 2217K
代理商： MC56F8347VPY60
56F8347 Signal Pins
568347 Technical Data
15
Preliminary
OCR_DIS
91
Input
On-Chip Regulator Disable —
Tie this pin to VSS to enable the on-chip regulator.
Tie this pin to VDD to disable the on-chip regulator.
This pin is intended to be a static DC signal from
power-up to shut down. Do no try to toggle this pin for
power savings during operation.
VCAP1*
62
Supply
VCAP1 - 4 — When OCR_DIS is tied to VSS (regulator
enabled), connect each pin to a 2.2
F or greater bypass
capacitor in order to bypass the core logic voltage
regulator, required for proper chip operation. When
OCR_DIS is tied to VDD (regulator disabled), these pins
become VDD_CORE and should be connected to a
regulated 2.5V power supply.
Note: This bypass is required even if the chip is
powered with an external supply.
VCAP2*
144
VCAP3*
95
VCAP4*
15
VPP1
141
Input
VPP1 - 2 — These pins should be left unconnected as an
open circuit for normal functionality.
VPP2
2
CLKMODE
99
Input
Clock Input Mode Selection — This input determines the
function of the XTAL and EXTAL pins.
1 = External clock input on XTAL is used to directly drive
the input clock of the chip. The EXTAL pin should be
grounded.
0 = A crystal or ceramic resonator should be connected
between XTAL and EXTAL.
EXTAL
94
Input
External Crystal Oscillator Input — This input can be
connected to an 8MHz external crystal. Tie this pin low if
XTAL is driven by an external clock source.
XTAL
93
Input/
Output
Chip-driven
Crystal Oscillator Output — This output connects the
internal crystal oscillator output to an external crystal.
If an external clock is used, XTAL must be used as the
input and EXTAL connected to GND.
The input clock can be selected to provide the clock
directly to the core. This input clock can also be selected
as the input clock for the on-chip PLL.
CLKO
3
Output
Tri-Stated
Clock Output — This pin outputs a buffered clock signal.
Using the SIM CLKO Select Register (SIM_CLKOSR), this
pin can be programmed as any of the following: disabled,
CLK_MSTR (system clock), IPBus clock, oscillator output,
prescaler clock and postscaler clock. Other signals are
also available for test purposes.
See Section 6.5.7 for details.
Table 2-2 56F8347 Signal and Package Information for the 160-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
* When the on-chip regulator is disabled, these four pins become 2.5V VDD_CORE.
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相關(guān)代理商/技術(shù)參數(shù)
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MC56F8347VVF 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
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