參數(shù)資料
型號: MC56F8347VPY60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP160
封裝: LQFP-160
文件頁數(shù): 70/160頁
文件大小: 2217K
代理商: MC56F8347VPY60
56F8347 Signal Pins
568347 Technical Data
17
Preliminary
A8
(GPIOA0)
19
Output
Schmitt
Input/
Output
Tri-stated
Input
Address Bus— A8 - A15 specify eight of the address lines
for external program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), A8 - A15 and EMI control signals
are tri-stated when the external bus is inactive.
Port A GPIO — These eight GPIO pins can be individually
programmed as input or output pins.
After reset, the default state is Address Bus.
To deactivate the internal pull-up resistor, clear the
appropriate GPIO bit in the GPIOA_PUR register.
Example: GPIOA0, clear bit 0 in the GPIOA_PUR register.
A9
(GPIOA1)
20
A10
(GPIOA2)
21
A11
(GPIOA3)
22
A12
(GPIOA4)
23
A13
(GPIOA5)
24
A14
(GPIOA6)
25
A15
(GPIOA7)
26
GPIOB0
(A16)
33
Schmitt
Input/
Output
Input
Port B GPIO — These four GPIO pins can be
programmed as input or output pins.
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), A16 - A19 and EMI control signals
are tri-stated when the external bus is inactive.
Address Bus — A16 - A19 specify one of the address
lines for external program or data memory accesses.
After reset, the startup state of GPIOB0 - GPIOB3 (GPIO
or address) is determined as a function of EXTBOOT,
EMI_MODE and the Flash security setting. See Table 4-4
for further information on when this pin is configured as an
address pin at reset. In all cases, this state may be
changed by writing to GPIOB_PER.
To deactivate the internal pull-up resistor, clear the
appropriate GPIO bit in the GPIOB_PUR register.
GPIOB1
(A17)
34
GPIOB2
(A18)
35
GPIOB3
(A19)
36
Table 2-2 56F8347 Signal and Package Information for the 160-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
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