參數(shù)資料
型號: MC56F8347VPY60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP160
封裝: LQFP-160
文件頁數(shù): 110/160頁
文件大?。?/td> 2217K
代理商: MC56F8347VPY60
Peripheral Memory Mapped Registers
568347 Technical Data
53
Preliminary
Table 4-18 Quadrature Decoder 1 Registers Address Map
(DEC1_BASE = $00 190)
Register Acronym
Address Offset
Register Description
DEC1_DECCR
$0
Decoder Control Register
DEC1_FIR
$1
Filter Interval Register
DEC1_WTR
$2
Watchdog Time-out Register
DEC1_POSD
$3
Position Difference Counter Register
DEC1_POSDH
$4
Position Difference Counter Hold Register
DEC1_REV
$5
Revolution Counter Register
DEC1_REVH
$6
Revolution Hold Register
DEC1_UPOS
$7
Upper Position Counter Register
DEC1_LPOS
$8
Lower Position Counter Register
DEC1_UPOSH
$9
Upper Position Hold Register
DEC1_LPOSH
$A
Lower Position Hold Register
DEC1_UIR
$B
Upper Initialization Register
DEC1_LIR
$C
Lower Initialization Register
DEC1_IMR
$D
Input Monitor Register
Table 4-19 Interrupt Control Registers Address Map
(ITCN_BASE = $00 F1A0)
Register Acronym
Address Offset
Register Description
IPR 0
$0
Interrupt Priority Register 0
IPR 1
$1
Interrupt Priority Register 1
IPR 2
$2
Interrupt Priority Register 2
IPR 3
$3
Interrupt Priority Register 3
IPR 4
$4
Interrupt Priority Register 4
IPR 5
$5
Interrupt Priority Register 5
IPR 6
$6
Interrupt Priority Register 6
IPR 7
$7
Interrupt Priority Register 7
IPR 8
$8
Interrupt Priority Register 8
IPR 9
$9
Interrupt Priority Register 9
VBA
$A
Vector Base Address Register
FIM0
$B
Fast Interrupt Match Register 0
FIVAL0
$C
Fast Interrupt Vector Address Low 0 Register
FIVAH0
$D
Fast Interrupt Vector Address High 0 Register
FIM1
$E
Fast Interrupt Match Register 1
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