參數資料
    型號: MC56F8123
    廠商: Motorola, Inc.
    英文描述: 16-bit Hybrid Controllers
    中文描述: 16位混合控制器
    文件頁數: 65/140頁
    文件大?。?/td> 1981K
    代理商: MC56F8123
    56F8323 Technical Data, Rev. 11.0
    30
    Freescale Semiconductor
    Preliminary
    OSCTL (oscillator control) register allow the user to set in an additional offset (trim) to this preset value
    to increase or decrease capacitance. Upon power-up, the default value of this trim is 512 units. Each unit
    added or deleted changes the output frequency by about 0.1%, allowing incremental adjustment until the
    desired frequency accuracy is achieved.
    The internal oscillator is calibrated at the factory to 8MHz and the TRIM value is stored in the Flash
    information block and loaded to the FMOPT1 register at reset. When using the relaxation oscillator, the
    boot code should read the FMOPT1 register and set this value as OSCTL TRIM. For further information,
    see the 56F8300 Peripherals User Manual.
    3.4 Internal Clock Operation
    At reset, both oscillators will be powered up; however, the relaxation oscillator will be the default clock
    reference for the PLL. Software should power down the block not being used and program the PLL for the
    correct frequency.
    Figure 3-4 Internal Clock Operation
    Crystal
    OSC
    Relaxation
    OSC
    CLK_MODE
    XTAL
    EXTAL
    MUX
    PRECS
    PLLCID
    PLL
    x (1 to 128)
    Postscaler
    ÷ (1, 2, 4, 8)
    ÷ 2
    Prescaler
    ÷ (1, 2, 4, 8)
    Lock
    Detector
    Loss of
    Reference
    Clock
    Detector
    MU
    X
    SYS_CLK2
    source to
    the SIM
    Postscaler CLK
    PLLDB
    PLLCOD
    LCK
    Bus Interface
    & Control
    Bus
    Interface
    FREF
    FEEDBA
    CK
    loss of reference
    clock interrupt
    MS
    T
    R
    _
    O
    S
    C
    FOUT
    FOUT/2
    ZSRC
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