參數(shù)資料
型號: MC33989DWR2
廠商: Freescale Semiconductor
文件頁數(shù): 69/72頁
文件大小: 0K
描述: IC SYSTEM BASE W/CAN 28-SOIC
標準包裝: 1
控制器類型: 系統(tǒng)基礎芯片
接口: CAN
電源電壓: 5.5 V ~ 18 V
電流 - 電源: 45mA
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 28-SOIC W
包裝: 剪切帶 (CT)
配用: KIT33989DWEVB-ND - KIT EVAL 33989DW HS SBC
其它名稱: MC33989DWR2CT
Analog Integrated Circuit Device Data
Freescale Semiconductor
71
33989
REVISION HISTORY
REVISION HISTORY
REVISION
DATE
DESCRIPTION OF CHANGES
4.91
7/2002
Released XC33989: Motorola Format
5.0
8/2005
Changed document to Freescale format
Added New Orderable Part Number
Maximum Rating Table; Added CANH, CANL and ESD ratings
Static Electrical Characteristics - Table 3
POWER INPUT (VSUP): (ISUP(STOP2); Max rating changed from 410 to 210 A)
POWER OUTPUT(VDD1): VDD1OUT Min rating changed from 4.0 to 4.75 V
Added CAN SUPPLY, CANH and CANL, TX and RX ratings
Dynamic Electrical Characteristics - Table 4
STATE MACHINE TIMING (CS, SCLK, MOSI, MISO, WD, INT): CSFWU7 max rating changed from
248 to 128 ms
Added CAN MODULE-SIGNAL EDGE RISE AND FALL TIMES (CANH, CANL) ratings
Revised Application Section
Added supplemental Application Notes
Added Thermal Addendum
6.0
9/2005
Cosmetic corrections
CS, INT and WD Pins were changed to CS, INT and WD
7.0
11/2005
Published in error
8.0
11/2005
Static Electrical Characteristics - Table 3, added new parameter “VDDst-cap” and Notes 14 and
16, corrected VDD1 output voltage VDD1OUT2 to minimum 4.0 V as previously published in revision
4.91.
Dynamic Electrical Characteristics - Table 4, Corrected Max Rating of 248 ms for Cyclic Sense/
FWU Timing 7 CSFWU7 as previously published in revision 4.91
9.0
1/2006
Dynamic Electrical Characteristics - Table 4,Corrected “Cyclic Sense ON Time” measurement
“Unit” from ms to s
10.0
6/2006
Updated to the prevailing Freescale form and style
Updated from Advance Information to Final documentation
Removed PC33989EG/R2 and replaced with MCZ33989EG/R2 in the Ordering Information block
11.0
11/2006
Replaced the label Logic Inputs with Logic Signals (RX, TX, MOSI, MISO, CS, SCLK, RST, WD,
Replaced Logic Output Pins with LOGIC Input PINS (MOSI, SCLK, CS) on page 9
Reviewed labeling for device pins VDD1, RST, INT, CS, VSUP, TX, RX, V2CTRL, V2, and WD
throughout the data sheet, and made corrections as applicable.
12.0
12/2006
Removed Peak Package Reflow Temperature During Reflow (solder reflow) parameter from
Maximum Ratings on page 4. Added note with instructions to obtain this information from
13.0
3/2007
Added the EG suffix to the included thermal addendum
14.0
2/2011
Removed part number MC33989DW and MC33989EG/R2, and added part number MC33989PEG
to the Ordering Information Table on Page 1.
14.0
6/2013
Updated document properties.
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