SUPPLEMENTAL APPLICATION NOTES Failure on VDD1, Wa" />
參數(shù)資料
型號(hào)： MC33989DWR2
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 40/72頁(yè)
文件大?。?/td> 0K
描述： IC SYSTEM BASE W/CAN 28-SOIC
標(biāo)準(zhǔn)包裝： 1
控制器類型： 系統(tǒng)基礎(chǔ)芯片
接口： CAN
電源電壓： 5.5 V ~ 18 V
電流 - 電源： 45mA
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 28-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 28-SOIC W
包裝： 剪切帶 (CT)
配用： KIT33989DWEVB-ND - KIT EVAL 33989DW HS SBC
其它名稱： MC33989DWR2CT
Analog Integrated Circuit Device Data
Freescale Semiconductor
45
33989
TYPICAL APPLICATIONS
SUPPLEMENTAL APPLICATION NOTES
Failure on VDD1, Watchdog, Reset, INT Pins
The paragraphs below describe the behavior of the device and of the INT, RST, and WD pins at power up and under failure
of VDD1.
Power Up and SBC Entering Normal Operation
After a power-up the SBC enters in Normal request mode (CAN interface is in TX/RX mode): VDD1 is on, V2 is off. After 350 ms
if no watchdog is written (no TIM1 register write) a reset occurs, and the SBC returns to normal request mode.During this
sequence WD is active (low level).
Once watchdog is written the SBC goes to normal mode: VDD1 is still on and V2 turns on, WD is no longer active and the reset
pin is high. If the watchdog is not refreshed, the SBC generates a reset and returns to Normal request mode.
Figure 23. Power Up and SBC Entering Normal Operation
Power Up and VDD1 Going Low with Stop Mode as Default Low Power Mode Selected
The first part of the following figure is identical to the above. If VDD1 is pulled below the VDD1 undervoltage reset (typ 4.6 V)
for instance by an overcurrent or short-circuit (ex short to 4.0 V), and if a low power mode previously selected was stop mode,
the SBC enters reset mode (reset pin is active). The pin WD stays high, but the high level (VOH) follows the VDD1 level. The
interrupt pin goes low.
When the VDD1 overload condition is removed, the SBC restarts in Normal request mode.
VDD1
SPI (CS)
INT
WD
RST
SBC in
RESET
mode
SBC in Normal request
mode
SBC in Normal
mode
SBC in Normal
request mode
SBC in Normal
mode
350 ms
Reset every 350 ms
Write Watchdog each X ms
No Watchdog is written
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