MBM29PL12LM
10
3
■
FEATURES
0.23
μ
m Process Technology
Single 3.0 V read, program and erase
Minimizes system level power requirements
Industry-standard pinouts
56-pin TSOP (1)
80-ball FBGA (Package suffix: PBT)
Minimum 100,000 program/erase cycles
High performance Page mode
Fast 8 bytes / 4 words access capabililty
Sector erase architecture
256
×
64K byte and 32K word sectors
Any combination of sectors can be concurrently erased. Also supports full chip erase
HiddenROM
256 bytes / 128 words of HiddenROM, accessible through a “HiddenROM Entry” command sequence
Factory serialized and protected to provide a secure electronic serial number (ESN)
WP/ACC input pin
At V
IL
, allows protection of outermost two 8K bytes / 4K words sectors, regardless of sector protection/unpro-
tection status
At V
ACC
, increases program performance
Embedded Erase
TM
* Algorithms
Automatically pre-programs and erases the chip or any sector
Embedded Program
TM
* Algorithms
Automatically writes and verifies data at specified address
Data Polling and Toggle Bit feature for detection of program or erase cycle completion
Ready/Busy output (RY/BY)
Hardware method for detection of program or erase cycle completion
Automatic sleep mode
When addresses remain stable, automatically switches themselves to low power mode
Erase Suspend/Resume
Suspends the erase operation to allow a read data and/or program in another sector within the same device
Low V
CC
write inhibit
≤
2.5 V
Sector Group Protection
Hardware method disables any combination of sector groups from program or erase operations
Sector Group Protection Set function by Extended sector protect command
Fast Programming Function by Extended Command
Temporary sector group unprotection
Temporary sector group unprotection via the RESET pin
This feature allows code changes in previously locked sectors
In accordance with CFI (Common Flash Memory Interface)
*
: Embedded Erase
TM
and Embedded Program
TM
are trademarks of Advanced Micro Devices, Inc.