參數(shù)資料
型號(hào): MB9BF505RPMC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP120
封裝: 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-120
文件頁(yè)數(shù): 17/120頁(yè)
文件大小: 1277K
代理商: MB9BF505RPMC
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)當(dāng)前第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)
113
8266D-MCU Wireless-06/12
ATmega128RFA1
9.12.13 CCA_THRES – Transceiver CCA Threshold Setting Register
Bit
7
6
NA ($149)
CCA_CS_THRES3
CCA_CS_THRES2
CCA_THRES
Read/Write
RW
Initial Value
1
Bit
5
4
NA ($149)
CCA_CS_THRES1
CCA_CS_THRES0
CCA_THRES
Read/Write
RW
Initial Value
0
Bit
3
2
NA ($149)
CCA_ED_THRES3
CCA_ED_THRES2
CCA_THRES
Read/Write
RW
Initial Value
0
1
Bit
1
0
NA ($149)
CCA_ED_THRES1
CCA_ED_THRES0
CCA_THRES
Read/Write
RW
Initial Value
1
This register sets the threshold level for the Energy Detection (ED) of the Clear Channel
Assessment (CCA).
Bit 7:4 – CCA_CS_THRES3:0 - CS Threshold Level for CCA Measurement
These bits are reserved for internal use.
Bit 3:0 – CCA_ED_THRES3:0 - ED Threshold Level for CCA Measurement
These bits define the received power threshold of the Energy above threshold
algorithm. The threshold is calculated by RSSI_BASE_VAL + 2CCA_ED_THRES
[dBm]. Any received power above this level is interpreted as a busy channel.
9.12.14 RX_CTRL – Transceiver Receive Control Register
Bit
7
6
5
4
NA ($14A)
Resx7
Resx6
Resx5
Resx4
RX_CTRL
Read/Write
RW
Initial Value
1
0
1
Bit
3
2
1
0
NA ($14A)
PDT_THRES3
PDT_THRES2
PDT_THRES1
PDT_THRES0
RX_CTRL
Read/Write
RW
Initial Value
0
1
The register controls the sensitivity of the Antenna Diversity Mode. Note that in High
Data Rate modes the ACR module will always be disabled.
Bit 7:4 – Resx7:4 - Reserved
Bit 3:0 – PDT_THRES3:0 - Receiver Sensitivity Control
These register bits control the sensitivity of the receiver correlation unit. If the Antenna
Diversity algorithm is enabled the value shall be set to PDT_THRES = 3. Otherwise it
shall be set back to the reset value. Values not listed in the following table are reserved.
相關(guān)PDF資料
PDF描述
MB9BF516TBGL 32-BIT, FLASH, RISC MICROCONTROLLER, PBGA192
MB9BF517TPMC 32-BIT, FLASH, RISC MICROCONTROLLER, PQFP176
MB9BF517SPMC 32-BIT, FLASH, RISC MICROCONTROLLER, PQFP144
MB9BF518TPMC 32-BIT, FLASH, RISC MICROCONTROLLER, PQFP176
MB9BF516SPMC 32-BIT, FLASH, RISC MICROCONTROLLER, PQFP144
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB9BF506NABGL-GE1 制造商:FUJITSU 功能描述:MCU 32BIT CORTEX-M3 FM3 112BGA 制造商:FUJITSU 功能描述:MCU, 32BIT, CORTEX-M3, FM3, 112BGA, Controller Family/Series:ARM Cortex-M3, Core
MB9BF506NAPMC-G-JNE1 制造商:FUJITSU 功能描述: 制造商:FUJITSU 功能描述:MCU 32BIT CORTEX-M3 FM3 100LQFP 制造商:FUJITSU 功能描述:MCU, 32BIT, CORTEX-M3, FM3, 100LQFP 制造商:FUJITSU 功能描述:MCU, 32BIT, CORTEX-M3, FM3, 100LQFP, Controller Family/Series:ARM Cortex-M3, Core Size:32bit, No. of I/O's:80, Supply Voltage Min:2.7V, Supply Voltage Max:5.5V, Digital IC Case Style:LQFP, No. of Pins:100, Program Memory Size:512KB, , RoHS Compliant: Yes
MB9BF506NBBGL-GE1 制造商:FUJITSU 功能描述:
MB9BF506NBPMC-G-JNE2 制造商:FUJITSU 功能描述:
MB9BF506NPMC-ESE1 制造商:FUJITSU 功能描述: